Native DRAM Cache: Re-architecting DRAM as a Large-Scale Cache for Data Centers

Contemporary data center CPUs are experiencing an unprecedented surge in core count. This trend necessitates scrutinized Last-Level Cache (LLC) strategies to accommodate increasing capacity demands. While DRAM offers significant capacity, using it as a cache poses challenges related to latency and e...

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Bibliographic Details
Published in:2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA) pp. 1144 - 1156
Main Authors: Ryu, Yesin, Kim, Yoojin, Jung, Giyong, Ahn, Jung Ho, Kim, Jungrae
Format: Conference Proceeding
Language:English
Published: IEEE 29.06.2024
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