Web-Based Simulator of Superscalar RISC-V Processors - Jaros, Jiri; Majer, Michal; Horky, Jakub; Vavra, Jan (SC24-W: Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis, 2024)
Mastering computational architectures is essential for developing fast and power-efficient programs. Our advanced simulator empowers both IT students and professionals to grasp the fundamentals of superscalar RISC-V processors, HW/SW co-design and HPC optimization techniques. With customizable processor and memory architecture, full C compiler support, and detailed runtime statistics, this tool offers a comprehensive learning experience. Enjoy the convenience of a modern, web-based GUI to enhance your understanding and skills.