Directed-Logical Testing for Functional Verification of Microprocessors

The length of the microprocessor development cycle is largely determined by functional verification, where contemporary practice relies primarily on constraint-based random stimulus generation to drive a simulation-based methodology. However, formal methods are, in particular, gaining wider adoption...

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Vydáno v:	2008 6th IEEE/ACM International Conference on Formal Methods and Models for Codesign s. 89 - 100
Hlavní autoři:	Katelman, M., Meseguer, J., Escobar, S.
Médium:	Konferenční příspěvek
Jazyk:	angličtina
Vydáno:	Washington, DC, USA IEEE Computer Society 01.06.2008 IEEE
Edice:	ACM Conferences
Témata:	Assembly Automatic testing Computer science Drives Hardware design languages Logic testing Microprocessors Pipelines Random number generation Scalability Theory of computation Theory of computation > Formal languages and automata theory Theory of computation > Formal languages and automata theory > Formalisms Theory of computation > Formal languages and automata theory > Formalisms > Rewrite systems Theory of computation > Formal languages and automata theory > Grammars and context-free languages Theory of computation > Semantics and reasoning Theory of computation > Semantics and reasoning > Program semantics
ISBN:	1424424178, 9781424424177
On-line přístup:	Získat plný text
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