Directed-Logical Testing for Functional Verification of Microprocessors
The length of the microprocessor development cycle is largely determined by functional verification, where contemporary practice relies primarily on constraint-based random stimulus generation to drive a simulation-based methodology. However, formal methods are, in particular, gaining wider adoption...
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| Published in: | 2008 6th IEEE/ACM International Conference on Formal Methods and Models for Codesign pp. 89 - 100 |
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| Main Authors: | , , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
Washington, DC, USA
IEEE Computer Society
01.06.2008
IEEE |
| Series: | ACM Conferences |
| Subjects: | |
| ISBN: | 1424424178, 9781424424177 |
| Online Access: | Get full text |
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