CoAXIAL: A CXL-Centric Memory System for Scalable Servers

The memory system is a major performance determinant for server processors. Ever-growing core counts and datasets demand higher memory bandwidth and capacity. DDR-the dominant processor interface to memory-requires a large number of on-chip pins, which is a scarce resource, thus limiting the process...

Full description

Bibliographic Details

Published in:	SC24: International Conference for High Performance Computing, Networking, Storage and Analysis pp. 1 - 15
Main Authors:	Cho, Albert, Saxena, Anish, Qureshi, Moinuddin, Daglis, Alexandros
Format:	Conference Proceeding
Language:	English
Published:	IEEE 17.11.2024
Subjects:	Bandwidth Delays High performance computing Limiting Pins Program processors Servers System analysis and design System-on-chip
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!