Modulo scheduling with integrated register spilling for clustered VLIW architectures
Clustering is a technique to decentralize the design of future wide issue VLIW cores and enable them to meet the technology constraints in terms of cycle time, area and power dissipation. In a clustered design, registers and functional units are grouped in clusters so that new instructions are neede...
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| Vydané v: | Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture s. 160 - 169 |
|---|---|
| Hlavní autori: | , , , |
| Médium: | Konferenčný príspevok.. Journal Article |
| Jazyk: | English |
| Vydavateľské údaje: |
Washington, DC, USA
IEEE Computer Society
01.01.2001
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| Edícia: | ACM Conferences |
| Predmet: |
Theory of computation
> Design and analysis of algorithms
> Approximation algorithms analysis
> Scheduling algorithms
Theory of computation
> Design and analysis of algorithms
> Online algorithms
> Online learning algorithms
Theory of computation
> Design and analysis of algorithms
> Online algorithms
> Online learning algorithms
> Scheduling algorithms
|
| ISBN: | 0769513697, 9780769513690 |
| ISSN: | 1072-4451 |
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| Abstract | Clustering is a technique to decentralize the design of future wide issue VLIW cores and enable them to meet the technology constraints in terms of cycle time, area and power dissipation. In a clustered design, registers and functional units are grouped in clusters so that new instructions are needed to move data between them. New aggressive instruction scheduling techniques are required to minimize the negative effect of resource clustering and delays in moving data around.In this paper we present a novel software pipelining technique that performs instruction scheduling with reduced register requirements, register allocation, register spilling and inter-cluster communication in a single step. The algorithm uses limited backtracking to reconsider previously taken decisions. This backtracking provides the algorithm with additional possibilities for obtaining high throughput schedules with low spill code requirements for clustered architectures. We show that the proposed approach outperforms previously proposed techniques and that it is very scalable independently of the number of clusters, the number of communication buses and communication latency. The paper also includes an exploration of some parameters in the design of future clustered VLIW cores. |
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| AbstractList | Clustering is a technique to decentralize the design of future wide issue VLIW cores and enable them to meet the technology constraints in terms of cycle time, area and power dissipation. In a clustered design, registers and functional units are grouped in clusters so that new instructions are needed to move data between them. New aggressive instruction scheduling techniques are required to minimize the negative effect of resource clustering and delays in moving data around.In this paper we present a novel software pipelining technique that performs instruction scheduling with reduced register requirements, register allocation, register spilling and inter-cluster communication in a single step. The algorithm uses limited backtracking to reconsider previously taken decisions. This backtracking provides the algorithm with additional possibilities for obtaining high throughput schedules with low spill code requirements for clustered architectures. We show that the proposed approach outperforms previously proposed techniques and that it is very scalable independently of the number of clusters, the number of communication buses and communication latency. The paper also includes an exploration of some parameters in the design of future clustered VLIW cores. |
| Author | Valero, Mateo Zalamea, Javier Llosa, Josep Ayguadé, Eduard |
| Author_xml | – sequence: 1 givenname: Javier surname: Zalamea fullname: Zalamea, Javier organization: Universitat Politècnica de Catalunya – sequence: 2 givenname: Josep surname: Llosa fullname: Llosa, Josep organization: Universitat Politècnica de Catalunya – sequence: 3 givenname: Eduard surname: Ayguadé fullname: Ayguadé, Eduard organization: Universitat Politècnica de Catalunya – sequence: 4 givenname: Mateo surname: Valero fullname: Valero, Mateo organization: Universitat Politècnica de Catalunya |
| BookMark | eNqNkD1PwzAQhi1RJNrSkT0TEymOHX-NqIJSqYilwGg5zqU1pHGxHfH3SSkSK-9yp_ce3fBM0KjzHSB0VeA5G3LLOFVKzhkvMcFnaIIFV6ygXIkRGhdYkLwsWXGBZjG-4yFCKCbwGG2efN23Pot2B8Pium325dIuc12CbTAJ6izA1sUEIYsH1_4QjQ-ZbftjOdxf16u3zAS7cwls6gPES3TemDbC7HdO0cvD_WbxmK-fl6vF3To3hJGU8xoDyAqzGoTB0qrSEiOkEJWFRjFCrSqoACOBY8BGClqSmvIGm0pYaRmdouvT30Pwnz3EpPcuWmhb04HvoyZcYlkI-gcau9eV9x9RF1gfxemTOH0SN4A3_wJ1FRw09BtQqG9s |
| ContentType | Conference Proceeding Journal Article |
| Copyright | Copyright (c) 2001 Institute of Electrical and Electronics Engineers, Inc. All rights reserved. |
| Copyright_xml | – notice: Copyright (c) 2001 Institute of Electrical and Electronics Engineers, Inc. All rights reserved. |
| DBID | 7SC 8FD JQ2 L7M L~C L~D |
| DOI | 10.5555/563998.564020 |
| DatabaseName | Computer and Information Systems Abstracts Technology Research Database ProQuest Computer Science Collection Advanced Technologies Database with Aerospace Computer and Information Systems Abstracts Academic Computer and Information Systems Abstracts Professional |
| DatabaseTitle | Computer and Information Systems Abstracts Technology Research Database Computer and Information Systems Abstracts – Academic Advanced Technologies Database with Aerospace ProQuest Computer Science Collection Computer and Information Systems Abstracts Professional |
| DatabaseTitleList | Computer and Information Systems Abstracts |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Computer Science |
| EndPage | 169 |
| GroupedDBID | 6IE 6IK 6IL AAJGR AAVQY ACM ADPZR ALMA_UNASSIGNED_HOLDINGS APO BEFXN BFFAM BGNUA BKEBE BPEOZ CBEJK GUFHI OCL RIB RIC RIE RIL -~X 123 29O 6IN 7SC 8FD AAWTH ADZIZ CHZPO IPLJI JQ2 L7M L~C L~D M43 RNS |
| ID | FETCH-LOGICAL-a252t-6d0ee8b05de7a08c94c2a7877bcef9523c9137ea8e60e0a87342d36f0ab7c8c53 |
| ISBN | 0769513697 9780769513690 |
| ISICitedReferencesCount | 21 |
| ISICitedReferencesURI | http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000173315400015&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| ISSN | 1072-4451 |
| IngestDate | Fri Jul 11 16:52:24 EDT 2025 Wed Jan 31 06:45:26 EST 2024 |
| IsPeerReviewed | false |
| IsScholarly | true |
| Language | English |
| LinkModel | OpenURL |
| MeetingName | MICRO-34: The 34th International Symposium on Microarchitecture |
| MergedId | FETCHMERGED-LOGICAL-a252t-6d0ee8b05de7a08c94c2a7877bcef9523c9137ea8e60e0a87342d36f0ab7c8c53 |
| Notes | SourceType-Scholarly Journals-2 ObjectType-Feature-2 ObjectType-Conference Paper-1 content type line 23 SourceType-Conference Papers & Proceedings-1 ObjectType-Article-3 |
| PQID | 26808173 |
| PQPubID | 23500 |
| PageCount | 10 |
| ParticipantIDs | proquest_miscellaneous_26808173 acm_books_10_5555_563998_564020 acm_books_10_5555_563998_564020_brief |
| PublicationCentury | 2000 |
| PublicationDate | 2001-01-01 |
| PublicationDateYYYYMMDD | 2001-01-01 |
| PublicationDate_xml | – month: 01 year: 2001 text: 2001-01-01 day: 01 |
| PublicationDecade | 2000 |
| PublicationPlace | Washington, DC, USA |
| PublicationPlace_xml | – name: Washington, DC, USA |
| PublicationSeriesTitle | ACM Conferences |
| PublicationTitle | Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture |
| PublicationYear | 2001 |
| Publisher | IEEE Computer Society |
| Publisher_xml | – name: IEEE Computer Society |
| SSID | ssj0000779570 ssj0008695 |
| Score | 1.7647785 |
| Snippet | Clustering is a technique to decentralize the design of future wide issue VLIW cores and enable them to meet the technology constraints in terms of cycle time,... |
| SourceID | proquest acm |
| SourceType | Aggregation Database Publisher |
| StartPage | 160 |
| SubjectTerms | Software and its engineering Software and its engineering -- Software notations and tools Software and its engineering -- Software notations and tools -- Compilers Theory of computation Theory of computation -- Design and analysis of algorithms Theory of computation -- Design and analysis of algorithms -- Approximation algorithms analysis Theory of computation -- Design and analysis of algorithms -- Approximation algorithms analysis -- Scheduling algorithms Theory of computation -- Design and analysis of algorithms -- Online algorithms Theory of computation -- Design and analysis of algorithms -- Online algorithms -- Online learning algorithms Theory of computation -- Design and analysis of algorithms -- Online algorithms -- Online learning algorithms -- Scheduling algorithms Theory of computation -- Models of computation Theory of computation -- Models of computation -- Concurrency Theory of computation -- Models of computation -- Concurrency -- Parallel computing models Theory of computation -- Theory and algorithms for application domains Theory of computation -- Theory and algorithms for application domains -- Machine learning theory Theory of computation -- Theory and algorithms for application domains -- Machine learning theory -- Reinforcement learning Theory of computation -- Theory and algorithms for application domains -- Machine learning theory -- Reinforcement learning -- Sequential decision making |
| Title | Modulo scheduling with integrated register spilling for clustered VLIW architectures |
| URI | https://www.proquest.com/docview/26808173 |
| WOSCitedRecordID | wos000173315400015&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwtV1Pb9MwFLe6iQM3EEMMBvgApynDiZM4OaIJBBKZdigwcYkc20GT0mRammn7OnxS3rMTpy1IEwd6iBq3cqr3e33v-f0l5I0Ja12BHRSA7c2DWKgqyEEGBqB6qzQ1WVzHtR02Ic7OsouL_Hyx-DXVwtw0om2z29v86r9CDWsANpbO_gPcflNYgPcAOlwBdrjuWMR_VT7nfrGf4v88tvVrtpH--9MCtsYjnu0UMTsD-7sVJnANKwwfFJimtxlj2OSsotND0x3DsRjUVOOdub7xBNbDYFkR9om-unQ9vzGZUTUDLsLn3758_n68ub037H9I4FAz5u-iyvYJQ03XSx-y8Gx693MAHrXBfivV9TB2CTixQ8Qa48p4CvhZnROg2Ni5Bw4sNoodt30f4Y7vwxJrmn4xpbnOB2QmUrAfeeoSgEcJHbrxBaOyD92cmF09ksALwEjQfMtOkhQP2XtkT4jQVQh6Lx4TIk8Ec_6g8WFjW6fpnrnOrrjlu60N0R5Sqz9sAGvYLB-Rg5kKdGadx2Rh2idk6aCmM9QUoaYz1HSCmk5QU4CaeqgpQk23oD4gXz9-WJ5-CsYxHIGMkmgdpJoZk1Us0UZIlqk8VpEEOS8qZeo8ibjKQy6MzEzKDJOZ4HGkeVozWQmVqYQ_Jftt15pnhMpacMMFi7VWcRIpybQEoiqdx3AOEfyQvAaSlPhv6ks4niLRSke00hHtkLy95xtlBXxUw04TWUsQmBgFk63phr6M7LAZwZ_f-6wX5OHMdEdkf309mJfkgbpZX_bXrywj_AbjjYgX |
| linkProvider | IEEE |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=Proceedings+of+the+34th+annual+ACM%2FIEEE+international+symposium+on+Microarchitecture&rft.atitle=Modulo+scheduling+with+integrated+register+spilling+for+clustered+VLIW+architectures&rft.au=Zalamea%2C+Javier&rft.au=Llosa%2C+Josep&rft.au=Ayguad%C3%A9%2C+Eduard&rft.au=Valero%2C+Mateo&rft.series=ACM+Conferences&rft.date=2001-01-01&rft.pub=IEEE+Computer+Society&rft.isbn=0769513697&rft.spage=160&rft.epage=169&rft_id=info:doi/10.5555%2F563998.564020 |
| thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=1072-4451&client=summon |
| thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=1072-4451&client=summon |
| thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=1072-4451&client=summon |