Evaluating the Security of eFPGA-based Redaction Algorithms

Hardware IP owners must envision procedures to avoid piracy and overproduction of their designs under a fabless paradigm. A newly proposed technique to obfuscate critical components in a logic design is called eFPGA-based redaction, which replaces a sensitive sub-circuit with an embedded FPGA, and t...

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Bibliographic Details
Published in:2022 IEEE/ACM International Conference On Computer Aided Design (ICCAD) pp. 1 - 7
Main Authors: Rezaei, Amin, Afsharmazayejani, Raheel, Maynard, Jordan
Format: Conference Proceeding
Language:English
Published: ACM 29.10.2022
Subjects:
Cycle Breaking
Cycle Unrolling
eFPGA-based Redaction
Hard Cycles
Logic Locking
Logic Obfuscation
SAT Attack
ISSN:1558-2434
Online Access:Get full text
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Summary:Hardware IP owners must envision procedures to avoid piracy and overproduction of their designs under a fabless paradigm. A newly proposed technique to obfuscate critical components in a logic design is called eFPGA-based redaction, which replaces a sensitive sub-circuit with an embedded FPGA, and the eFPGA is configured to perform the same functionality as the missing sub-circuit. In this case, the configuration bitstream acts as a hidden key only known to the hardware IP owner. In this paper, we first evaluate the security promise of the existing eFPGA-based redaction algorithms as a preliminary study. Then, we break eFPGA-based redaction schemes by an initial but not necessarily efficient attack named DIP Exclusion that excludes problematic input patterns from checking in a brute-force manner. Finally, by combining cycle breaking and unrolling, we propose a novel and powerful attack called Break & Unroll that is able to recover the bitstream of state-of-the-art eFPGA-based redaction schemes in a relatively short time even with the existence of hard cycles and large size keys. This study reveals that the common perception that eFPGA-based redaction is by default secure against oracle-guided attacks, is prejudice. It also shows that additional research on how to systematically create an exponential number of non-combinational hard cycles is required to secure eFPGA-based redaction schemes.
ISSN:1558-2434
DOI:10.1145/3508352.3549425