IC/IP Piracy Assessment of Reversible Logic

Reversible logic is a building block for adiabatic and quantum computing in addition to other applications. Since common functions are non-reversible, one needs to embed them into proper-size reversible functions by adding ancillary inputs and garbage outputs. We explore the Intellectual Property (I...

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Veröffentlicht in:2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) S. 1 - 8
Hauptverfasser: Saeed, Samah Mohamed, Cui, Xiaotong, Zulehner, Alwin, Wille, Robert, Drechsler, Rolf, Wu, Kaijie, Karri, Ramesh
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: ACM 01.11.2018
Schlagworte:
Adders
Ancillary inputs
BDD
Garbage outputs
IC/IP piracy
Integrated circuit modeling
IP networks
Logic gates
Number of embeddings
QMDD
Reversible logic
Security
Trojan horses
ISSN:1558-2434
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Abstract Reversible logic is a building block for adiabatic and quantum computing in addition to other applications. Since common functions are non-reversible, one needs to embed them into proper-size reversible functions by adding ancillary inputs and garbage outputs. We explore the Intellectual Property (IP) piracy of reversible circuits. The number of embeddings of regular functions in a reversible function and the percent of leaked ancillary inputs measure the difficulty of recovering the embedded function. To illustrate the key concepts, we study reversible logic circuits designed using reversible logic synthesis tools based on Binary Decision Diagrams and Quantum Multi-valued Decision Diagrams.
AbstractList Reversible logic is a building block for adiabatic and quantum computing in addition to other applications. Since common functions are non-reversible, one needs to embed them into proper-size reversible functions by adding ancillary inputs and garbage outputs. We explore the Intellectual Property (IP) piracy of reversible circuits. The number of embeddings of regular functions in a reversible function and the percent of leaked ancillary inputs measure the difficulty of recovering the embedded function. To illustrate the key concepts, we study reversible logic circuits designed using reversible logic synthesis tools based on Binary Decision Diagrams and Quantum Multi-valued Decision Diagrams.
Author Karri, Ramesh
Wille, Robert
Zulehner, Alwin
Cui, Xiaotong
Saeed, Samah Mohamed
Drechsler, Rolf
Wu, Kaijie
Author_xml – sequence: 1
  givenname: Samah Mohamed
  surname: Saeed
  fullname: Saeed, Samah Mohamed
  organization: City University of New York, New York, USA
– sequence: 2
  givenname: Xiaotong
  surname: Cui
  fullname: Cui, Xiaotong
  organization: Chongqing University, Chongqing, China
– sequence: 3
  givenname: Alwin
  surname: Zulehner
  fullname: Zulehner, Alwin
  organization: Johannes Kepler University, Linz, Austria
– sequence: 4
  givenname: Robert
  surname: Wille
  fullname: Wille, Robert
  organization: Johannes Kepler University, Linz, Austria
– sequence: 5
  givenname: Rolf
  surname: Drechsler
  fullname: Drechsler, Rolf
  organization: University of Bremen, DFKI, Bremen, Germany
– sequence: 6
  givenname: Kaijie
  surname: Wu
  fullname: Wu, Kaijie
  organization: New York University, New York, USA
– sequence: 7
  givenname: Ramesh
  surname: Karri
  fullname: Karri, Ramesh
  organization: New York University, New York, USA
BookMark eNotjk1LAzEURaMo2NauXbjJXqbNy3eWZbA6MGARXZdM8iKRdkYmRei_d0RXB-6By5mTq37okZA7YCsAqdaCS2a0Wv3Sgrkg82llQjnFzCWZgVK24lLIG7Is5ZMxxq2BSc_IQ1Ovmx3d5dGHM92UgqUcsT_RIdFX_Max5O6AtB0-crgl18kfCi7_uSDv28e3-rlqX56aetNWnktzqrDjJnRKOwkJYGpAcFGEzkYeNQ8-ROEdqIjK8RgNWKct6MR0DCawJMSC3P_9ZkTcf4356Mfz3iprtDTiB3CsQfE
ContentType Conference Proceeding
DBID 6IE
6IH
CBEJK
RIE
RIO
DOI 10.1145/3240765.3240817
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan (POP) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEEE Electronic Library (IEL)
IEEE Proceedings Order Plans (POP) 1998-present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
EISBN 1450359507
9781450359504
EISSN 1558-2434
EndPage 8
ExternalDocumentID 8587647
Genre orig-research
GroupedDBID 123
6IE
6IF
6IH
6IL
6IN
AAWTH
ABLEC
ADZIZ
ALMA_UNASSIGNED_HOLDINGS
APO
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
CHZPO
FEDTE
IEGSK
IJVOP
M43
OCL
RIE
RIL
RIO
ID FETCH-LOGICAL-a247t-eb27cb56941f11595e19d3cb8d2d62cacd3a915de592dd71896816f06dc7c0f33
IEDL.DBID RIE
ISICitedReferencesCount 4
ISICitedReferencesURI http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000494640800005&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
IngestDate Wed Aug 27 02:56:49 EDT 2025
IsPeerReviewed false
IsScholarly true
Language English
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-a247t-eb27cb56941f11595e19d3cb8d2d62cacd3a915de592dd71896816f06dc7c0f33
PageCount 8
ParticipantIDs ieee_primary_8587647
PublicationCentury 2000
PublicationDate 2018-Nov.
PublicationDateYYYYMMDD 2018-11-01
PublicationDate_xml – month: 11
  year: 2018
  text: 2018-Nov.
PublicationDecade 2010
PublicationTitle 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
PublicationTitleAbbrev ICCAD
PublicationYear 2018
Publisher ACM
Publisher_xml – name: ACM
SSID ssj0002871359
ssj0020286
Score 2.096591
Snippet Reversible logic is a building block for adiabatic and quantum computing in addition to other applications. Since common functions are non-reversible, one...
SourceID ieee
SourceType Publisher
StartPage 1
SubjectTerms Adders
Ancillary inputs
BDD
Garbage outputs
IC/IP piracy
Integrated circuit modeling
IP networks
Logic gates
Number of embeddings
QMDD
Reversible logic
Security
Trojan horses
Title IC/IP Piracy Assessment of Reversible Logic
URI https://ieeexplore.ieee.org/document/8587647
WOSCitedRecordID wos000494640800005&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LS8NAEB7a4kEvPlrxTQ7eNG2SfeYoxWIvJYhCbyWZmUBBWulD8N-7m4ao4MXTLnva2WX5Zmbn-wbg1ipJRnEcolAYytJiWCimkLQQKPJCc5pXzSbMZGKn0zRrwX3DhWHmqviM-35a_eXTErc-VTawyr1dadrQNkbvuFpNPsV7_sJDcx1suQVdS_nEUg287pzRqu9HG__upVJByejwf5s4gt43Jy_IGrQ5hhYvTuDgh5xgF-7Gw8E4C7L5KsfP4KHR3AyWZfDMVf1F8caBb6-MPXgdPb4Mn8K6GUKYJ9JsQhcBGyyU552WzotL3fmmJLCwlJBOMEcSeRorYpUmRA5xUm1jXUaa0GBUCnEKncVywWcQoKYyokI6ZwGliw8tuijLRIQlS8lUnEPXmz173-ldzGqLL_5evoR950TYHT_vCjqb1ZavYQ8_NvP16qa6pC8CX5Ej
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LS8NAEB5qFdSLj1Z8m4M3TZtknzlKsbRYS5AKvZVkZgOF0kptBf-9u2mICl487bKnnV2Weex83wdwqwUnJUzoIxPo81yjnwlDPknGkKWZNHFaiE2o4VCPx3FSg_sKC2OMKZrPTMtNi798WuDalcraWti3y9UWbDvlrBKtVVVUXOzPnHMu0y27IEsyn5CLtmOeU1K03KjD32oqhTPpHvxvG4fQ_EbleUnlb46gZubHsP-DULABd_1Ou594yXSZ4qf3ULFueovcezFFB0Y2M54TWMYmvHYfR52eX8oh-GnE1cq3ObDCTDjkaW7juNiecEwMM00RyQhTJJbGoSAj4ojI-pxY6lDmgSRUGOSMnUB9vpibU_BQUh5Qxm24gNxmiBptnqUCwtxwbig7g4Yze_K2YbyYlBaf_718A7u90fNgMugPny5gz4YUeoPWu4T6ark2V7CDH6vp-_K6uLAvyEiUbA
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=proceeding&rft.title=2018+IEEE%2FACM+International+Conference+on+Computer-Aided+Design+%28ICCAD%29&rft.atitle=IC%2FIP+Piracy+Assessment+of+Reversible+Logic&rft.au=Saeed%2C+Samah+Mohamed&rft.au=Cui%2C+Xiaotong&rft.au=Zulehner%2C+Alwin&rft.au=Wille%2C+Robert&rft.date=2018-11-01&rft.pub=ACM&rft.eissn=1558-2434&rft.spage=1&rft.epage=8&rft_id=info:doi/10.1145%2F3240765.3240817&rft.externalDocID=8587647