Virtues and limitations of commodity hardware transactional memory
Over the last years Transactional Memory (TM) gained growing popularity as a simpler, attractive alternative to classic lock-based synchronization schemes. Recently, the TM landscape has been profoundly changed by the integration of Hardware TM (HTM) in Intel commodity processors, raising a number o...
Uložené v:
| Vydané v: | PACT '14 : proceedings of the 23rd International Conference on Parallel Architectures and Compilation Techniques : August 24-27, 2014, Edmonton, AB, Canada s. 3 - 14 |
|---|---|
| Hlavní autori: | , , |
| Médium: | Konferenčný príspevok.. |
| Jazyk: | English |
| Vydavateľské údaje: |
ACM
01.08.2014
|
| Predmet: | |
| On-line prístup: | Získať plný text |
| Tagy: |
Pridať tag
Žiadne tagy, Buďte prvý, kto otaguje tento záznam!
|
| Abstract | Over the last years Transactional Memory (TM) gained growing popularity as a simpler, attractive alternative to classic lock-based synchronization schemes. Recently, the TM landscape has been profoundly changed by the integration of Hardware TM (HTM) in Intel commodity processors, raising a number of questions on the future of TM. We seek answers to these questions by conducting the largest study on TM to date, comparing different locking techniques, hardware and software TMs, as well as different combinations of these mechanisms, from the dual perspective of performance and power consumption. Our study sheds a mix of light and shadows on currently available commodity HTM: on one hand, we identify workloads in which HTM clearly outperforms any alternative synchronization mechanism; on the other hand, we show that current HTM implementations suffer of restrictions that narrow the scope in which these can be more effective than state of the art software solutions. Thanks to the results of our study, we identify a number of compelling research problems in the areas of TM design, compilers and self-tuning. |
|---|---|
| AbstractList | Over the last years Transactional Memory (TM) gained growing popularity as a simpler, attractive alternative to classic lock-based synchronization schemes. Recently, the TM landscape has been profoundly changed by the integration of Hardware TM (HTM) in Intel commodity processors, raising a number of questions on the future of TM. We seek answers to these questions by conducting the largest study on TM to date, comparing different locking techniques, hardware and software TMs, as well as different combinations of these mechanisms, from the dual perspective of performance and power consumption. Our study sheds a mix of light and shadows on currently available commodity HTM: on one hand, we identify workloads in which HTM clearly outperforms any alternative synchronization mechanism; on the other hand, we show that current HTM implementations suffer of restrictions that narrow the scope in which these can be more effective than state of the art software solutions. Thanks to the results of our study, we identify a number of compelling research problems in the areas of TM design, compilers and self-tuning. |
| Author | Romano, Paolo Rodrigues, Luis Diegues, Nuno |
| Author_xml | – sequence: 1 givenname: Nuno surname: Diegues fullname: Diegues, Nuno email: nmld@tecnico.ulisboa.pt organization: Inst. Super. Tecnico, Univ. de Lisboa, Lisbon, Portugal – sequence: 2 givenname: Paolo surname: Romano fullname: Romano, Paolo email: paolo.romano@tecnico.ulisboa.pt organization: Inst. Super. Tecnico, Univ. de Lisboa, Lisbon, Portugal – sequence: 3 givenname: Luis surname: Rodrigues fullname: Rodrigues, Luis email: ler@tecnico.ulisboa.pt organization: Inst. Super. Tecnico, Univ. de Lisboa, Lisbon, Portugal |
| BookMark | eNotjk1LxDAYhCMoqGvPHrzkD3RN0qZJj7roKix42fW6vE3eYqRpJIlI_73x4zTMzMMwl-R0DjMScs3ZmvNW3opOaKb4-lc1OyFVr3QpWFN8r89JldI7Y6xEUon-gty_upg_MVGYLZ2cdxmyC3OiYaQmeB-sywt9g2i_ICLNEeYE5geBiXr0IS5X5GyEKWH1rytyeHzYb57q3cv2eXO3q0G0Ktd2sEoLCQN0I3Bj2sYyC2NnRDkyGiOgcEL2HBFMM4A1GoRtzVAApjk2K3Lzt-sQ8fgRnYe4HJWWUuu2-QZO2Uy2 |
| ContentType | Conference Proceeding |
| DBID | 6IE 6IL CBEJK RIE RIL |
| DOI | 10.1145/2628071.2628080 |
| DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume IEEE Xplore All Conference Proceedings IEEE/IET Electronic Library IEEE Proceedings Order Plans (POP All) 1998-Present |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Computer Science |
| EISBN | 9781450328098 1450328091 |
| EndPage | 14 |
| ExternalDocumentID | 7855884 |
| Genre | orig-research |
| GroupedDBID | 6IE 6IL ACM ALMA_UNASSIGNED_HOLDINGS APO CBEJK GUFHI LHSKQ RIE RIL |
| ID | FETCH-LOGICAL-a247t-dbd7825aba6fa1cc43d0daf6c2729fcc2aa242591eeac3badc8a2d4cbc27081e3 |
| IEDL.DBID | RIE |
| ISICitedReferencesCount | 42 |
| ISICitedReferencesURI | http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000396396800002&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| IngestDate | Wed Aug 27 02:07:49 EDT 2025 |
| IsDoiOpenAccess | false |
| IsOpenAccess | true |
| IsPeerReviewed | false |
| IsScholarly | true |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-a247t-dbd7825aba6fa1cc43d0daf6c2729fcc2aa242591eeac3badc8a2d4cbc27081e3 |
| PageCount | 12 |
| ParticipantIDs | ieee_primary_7855884 |
| PublicationCentury | 2000 |
| PublicationDate | 2014-Aug. |
| PublicationDateYYYYMMDD | 2014-08-01 |
| PublicationDate_xml | – month: 08 year: 2014 text: 2014-Aug. |
| PublicationDecade | 2010 |
| PublicationTitle | PACT '14 : proceedings of the 23rd International Conference on Parallel Architectures and Compilation Techniques : August 24-27, 2014, Edmonton, AB, Canada |
| PublicationTitleAbbrev | PACT |
| PublicationYear | 2014 |
| Publisher | ACM |
| Publisher_xml | – name: ACM |
| SSID | ssj0001455729 |
| Score | 2.1625767 |
| Snippet | Over the last years Transactional Memory (TM) gained growing popularity as a simpler, attractive alternative to classic lock-based synchronization schemes.... |
| SourceID | ieee |
| SourceType | Publisher |
| StartPage | 3 |
| SubjectTerms | Empirical Study Energy Efficiency Hardware Instruments Power demand Program processors Programming Synchronization Synchronization Techniques Transactional Memory |
| Title | Virtues and limitations of commodity hardware transactional memory |
| URI | https://ieeexplore.ieee.org/document/7855884 |
| WOSCitedRecordID | wos000396396800002&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV07T8NADLbaioGJR4t46wZGQtu7JHdZQVRMVQdA3SrfS6rUJiikIP49viS0DCxMSU6RIjmJ_dnnzx_AjRA6USqlTFU6SlC4tpEeKx8pcpjCKJ1524hNyOlUzefZrAO3Wy6Mc65uPnN34bTey7eF2YRS2VCqJPAqu9CVUjZcrV09JU4SAort9B66GvI0THqhHDAcw9jHX_IpdfSYHPzvuYcw2NHw2GwbYI6g4_JjOPjRYWDtb9mH-9dlWZF7Z5hbtgqMpaYMxwrP6INaF5agNgv0qk8sHat2EuG4YuvQavs1gJfJ4_PDU9RqI0TIY1lFVluK7QlqTD2OjYmFHVn0qeFkBG8MRwzJRDZ25FmFRmsUchsbTTcQCnDiBHp5kbtTYAEBkpdDP0KMbeqUEJm1qaBlH3NuzqAfTLJ4a8ZfLFprnP-9fAH7hCnipkfuEnpVuXFXsGc-quV7eV2_s29WVpsF |
| linkProvider | IEEE |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NT4NAEJ3UaqKnqq3x2z14FFt2F1iuGpsaa9NDNb01-0XSpAWDVOO_dxaw9eDFE7AhIRlg5s3svHkA14ypQIgQM9XIYoJClfGULxJPoMNkWqg4MZXYRDQaiek0HjfgZs2FsdaWzWf21p2We_km0ytXKutGInC8yi3YDjinfsXW2lRUeBAgVKzn9-BVl4Zu1gtmge7oBj_-ElAp40e_9b8n70NnQ8Qj43WIOYCGTQ-h9aPEQOofsw13r_O8QAdPZGrIwnGWqkIcyRKCn9QyMwi2iSNYfcrckmIjEi4XZOmabb868NJ_mNwPvFodwZOUR4VnlMHoHkglw0T6WnNmekYmoaZohERrKqVLJ2Lfom9lShotJDVcK7wBcYBlR9BMs9QeA3EYEP2cTHpSchNawVhsTMhwOeGU6hNoO5PM3qoBGLPaGqd_L1_B7mDyPJwNH0dPZ7CHCINXHXPn0Czylb2AHf1RzN_zy_L9fQOS8J5M |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=PACT+%2714+%3A+proceedings+of+the+23rd+International+Conference+on+Parallel+Architectures+and+Compilation+Techniques+%3A+August+24-27%2C+2014%2C+Edmonton%2C+AB%2C+Canada&rft.atitle=Virtues+and+limitations+of+commodity+hardware+transactional+memory&rft.au=Diegues%2C+Nuno&rft.au=Romano%2C+Paolo&rft.au=Rodrigues%2C+Luis&rft.date=2014-08-01&rft.pub=ACM&rft.spage=3&rft.epage=14&rft_id=info:doi/10.1145%2F2628071.2628080&rft.externalDocID=7855884 |