Enforcing architectural contracts in high-level synthesis

We present a high-level synthesis technique that takes as input two orthogonal descriptions: (a) a behavioral architectural contract between the implementation and the user, and (b) a microarchitecture on which the architectural contract can be implemented. We describe a prototype compiler that gene...

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Veröffentlicht in:2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC) S. 824 - 829
Hauptverfasser: Patil, Nikhil, Bansal, Ankit, Chiou, Derek
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: New York, NY, USA ACM 05.06.2011
IEEE
Schriftenreihe:ACM Conferences
Schlagworte:
Architecture
Computer architecture
Contracts
E-unification
Equations
Hardware
Hardware > Electronic design automation > High-level and register-transfer level synthesis
Hardware > Electronic design automation > Methodologies for EDA
Hardware > Integrated circuits > Logic circuits > Arithmetic and datapath circuits
Hardware > Integrated circuits > Logic circuits > Design modules and hierarchy
Microarchitecture
Pipelines
Registers
synthesis
synthesis
unification
microarchitecture
architecture
ISBN:1450306365, 9781450306362
ISSN:0738-100X
Online-Zugang:Volltext
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Beschreibung
Zusammenfassung:We present a high-level synthesis technique that takes as input two orthogonal descriptions: (a) a behavioral architectural contract between the implementation and the user, and (b) a microarchitecture on which the architectural contract can be implemented. We describe a prototype compiler that generates control required to enforce the contract, and thus, synthesizes the pair of descriptions to hardware.
ISBN:1450306365
9781450306362
ISSN:0738-100X
DOI:10.1145/2024724.2024909