Rinnegan: Efficient resource use in heterogeneous architectures
Current processors provide a variety of different processing units to improve performance and power efficiency. For example, ARM's big.LITTLE, AMD's APUs, and Oracle's M7 provide heterogeneous processors, on-die GPUs, and on-die accelerators. However, the performance experienced by pr...
Uložené v:
| Vydané v: | 2016 International Conference on Parallel Architecture and Compilation Techniques (PACT) s. 373 - 386 |
|---|---|
| Hlavní autori: | , |
| Médium: | Konferenčný príspevok.. |
| Jazyk: | English |
| Vydavateľské údaje: |
ACM
01.09.2016
|
| Predmet: | |
| On-line prístup: | Získať plný text |
| Tagy: |
Pridať tag
Žiadne tagy, Buďte prvý, kto otaguje tento záznam!
|
| Abstract | Current processors provide a variety of different processing units to improve performance and power efficiency. For example, ARM's big.LITTLE, AMD's APUs, and Oracle's M7 provide heterogeneous processors, on-die GPUs, and on-die accelerators. However, the performance experienced by programs using these processing units can vary widely due to contention from multiprogramming, thermal constraints and other issues. In these systems, the decision of where to execute a task must consider not only execution time of the task, but also current system conditions. We built Rinnegan, a Linux kernel extension and runtime library, to perform scheduling and handle task placement in heterogeneous systems. The Rinnegan kernel extension monitors and reports the utilization of all processing units to applications, which then makes placement decisions at user level. The Rinnegan runtime provides a performance model to predict the speedup and overhead of offloading a task. With this model and the current utilization of processing units, the runtime can select the task placement that best achieves an application's performance goals, such as low latency, high throughput, or real-time deadlines. When integrated with StarPU, a runtime system for heterogeneous architectures, Rinnegan improves StarPU by performing 1.5- 2× better than its native scheduling policies in a shared heterogeneous environment. |
|---|---|
| AbstractList | Current processors provide a variety of different processing units to improve performance and power efficiency. For example, ARM's big.LITTLE, AMD's APUs, and Oracle's M7 provide heterogeneous processors, on-die GPUs, and on-die accelerators. However, the performance experienced by programs using these processing units can vary widely due to contention from multiprogramming, thermal constraints and other issues. In these systems, the decision of where to execute a task must consider not only execution time of the task, but also current system conditions. We built Rinnegan, a Linux kernel extension and runtime library, to perform scheduling and handle task placement in heterogeneous systems. The Rinnegan kernel extension monitors and reports the utilization of all processing units to applications, which then makes placement decisions at user level. The Rinnegan runtime provides a performance model to predict the speedup and overhead of offloading a task. With this model and the current utilization of processing units, the runtime can select the task placement that best achieves an application's performance goals, such as low latency, high throughput, or real-time deadlines. When integrated with StarPU, a runtime system for heterogeneous architectures, Rinnegan improves StarPU by performing 1.5- 2× better than its native scheduling policies in a shared heterogeneous environment. |
| Author | Swift, Michael Panneerselvam, Sankaralingam |
| Author_xml | – sequence: 1 givenname: Sankaralingam surname: Panneerselvam fullname: Panneerselvam, Sankaralingam email: sankarp@cs.wisc.edu organization: Univ. of Wisconsin-Madison, Madison, WI, USA – sequence: 2 givenname: Michael surname: Swift fullname: Swift, Michael email: swift@cs.wisc.edu organization: Univ. of Wisconsin-Madison, Madison, WI, USA |
| BookMark | eNotjMtKAzEUQCPoQmvXLtzkB6bmNfcmbkRKfUBBEF2XJHPTBjQjmczCv7eoq7M4h3PBTstYiLErKVZSmv5GOUCn7eqXYE7Y0qE9CqGNVNKds7vXXArtfbnlm5RyzFQarzSNc43E54l4LvxAjeq4p0LjPHFf4yE3im0-dpfsLPmPiZb_XLD3h83b-qnbvjw-r--3nVcGW4cGbQxaa297BYSU7JAEwmD1gMYkH4IgJwe0ALGX2pkAhpyCGFQQMekFu_77ZiLafdX86ev3DrEHRKl_AEglRkA |
| ContentType | Conference Proceeding |
| DBID | 6IE 6IL CBEJK RIE RIL |
| DOI | 10.1145/2967938.2967964 |
| DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume IEEE Xplore All Conference Proceedings IEEE Electronic Library (IEL) IEEE Proceedings Order Plans (POP All) 1998-Present |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE Xplore Digital Library (LUT) url: https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| EISBN | 9781450341219 1450341217 |
| EndPage | 386 |
| ExternalDocumentID | 7756771 |
| Genre | orig-research |
| GroupedDBID | 6IE 6IL CBEJK RIE RIL |
| ID | FETCH-LOGICAL-a247t-7478cb333a8526e7ef8df076d83d744fabb0e91d7866c51394b64e926cb2b0cf3 |
| IEDL.DBID | RIE |
| ISICitedReferencesCount | 10 |
| ISICitedReferencesURI | http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000392249100032&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| IngestDate | Thu Jun 29 18:38:04 EDT 2023 |
| IsPeerReviewed | false |
| IsScholarly | true |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-a247t-7478cb333a8526e7ef8df076d83d744fabb0e91d7866c51394b64e926cb2b0cf3 |
| PageCount | 14 |
| ParticipantIDs | ieee_primary_7756771 |
| PublicationCentury | 2000 |
| PublicationDate | 2016-Sept. |
| PublicationDateYYYYMMDD | 2016-09-01 |
| PublicationDate_xml | – month: 09 year: 2016 text: 2016-Sept. |
| PublicationDecade | 2010 |
| PublicationTitle | 2016 International Conference on Parallel Architecture and Compilation Techniques (PACT) |
| PublicationTitleAbbrev | PACT |
| PublicationYear | 2016 |
| Publisher | ACM |
| Publisher_xml | – name: ACM |
| Score | 2.0642211 |
| Snippet | Current processors provide a variety of different processing units to improve performance and power efficiency. For example, ARM's big.LITTLE, AMD's APUs, and... |
| SourceID | ieee |
| SourceType | Publisher |
| StartPage | 373 |
| SubjectTerms | Central Processing Unit Kernel Monitoring Processor scheduling Program processors Resource management Runtime |
| Title | Rinnegan: Efficient resource use in heterogeneous architectures |
| URI | https://ieeexplore.ieee.org/document/7756771 |
| WOSCitedRecordID | wos000392249100032&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV07TwMxDI5KxcAEqEW8lYGRtHeXnJOwMKBWDKiqEKBuVR4-6HJFff1-kvRUOrAwJYqUh2VLfsT-TMiddJUSXgHTXgATkBtmMddMxcSm8HKjE5TSx4scjdRkosctcr-rhUHElHyGvThNf_l-7tYxVNaXsgQZC8YPpIRtrVaD1pOLsl9oCMKmemmMCAJ77VKSthge_--eE9L9Lbuj451COSUtrDvk8TV2x_o09QMdJLiHsJUumqA7XS-Rzmr6FZNa5kEWMDjydP9zYNkl78PB29Mza7oeMFMIuWIR0N5ZzrlRZQEosVK-yiR4xb0UojLWZqhzLxWAK4MBJywI1AU4W9jMVfyMtOt5jeeEltzkSgcfRIET0gjNq0Jn4XQUKnBCXJBOJH76vQW2mDZ0X_69fEWOgrUA2wSra9JeLdZ4Qw7dZjVbLm4TN34A2_SONw |
| linkProvider | IEEE |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LTwIxEG4ImuhJDRjf9uDRwu6224cXDwaCEQkxaLiRPmaVy0J4-PttywY5ePHUpkkfk5lkHp35BqE7YQvJnOREOcYJ46kmBlJFZEhs8i_XKkIpffTFYCDHYzWsofttLQwAxOQzaIVp_Mt3M7sOobK2EDkXoWB8L3TOqqq1KryelOXtTHEvbrIVx4AhsNMwJeqL7tH_bjpGzd_COzzcqpQTVIOygR7fQn-sT10-4E4EfPBb8aIKu-P1EvC0xF8hrWXmpQG8K493vweWTfTe7YyeeqTqe0B0xsSKBEh7ayilWuYZBwGFdEUiuJPUCcYKbUwCKnVCcm5zb8IxwxmojFuTmcQW9BTVy1kJZwjnVKdSeS9EcsuEZooWmUr86cCk5wU7R41A_GS-gbaYVHRf_L18iw56o9f-pP88eLlEh9524Jt0qytUXy3WcI327fdqulzcRM78AHV5kYA |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2016+International+Conference+on+Parallel+Architecture+and+Compilation+Techniques+%28PACT%29&rft.atitle=Rinnegan%3A+Efficient+resource+use+in+heterogeneous+architectures&rft.au=Panneerselvam%2C+Sankaralingam&rft.au=Swift%2C+Michael&rft.date=2016-09-01&rft.pub=ACM&rft.spage=373&rft.epage=386&rft_id=info:doi/10.1145%2F2967938.2967964&rft.externalDocID=7756771 |