Using intra-core loop-task accelerators to improve the productivity and performance of task-based parallel programs

Task-based parallel programming frameworks offer compelling productivity and performance benefits for modern chip multi-processors (CMPs). At the same time, CMPs also provide packed-SIMD units to exploit fine-grain data parallelism. Two fundamental challenges make using packed-SIMD units with task-p...

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Veröffentlicht in:	MICRO-50 : the 50th annual IEEE/ACM International Symposium on Microarchitecture : proceedings : October 14-18, 2017, Cambridge, MA S. 759 - 773
Hauptverfasser:	Kim, Ji, Jiang, Shunning, Torng, Christopher, Wang, Moyang, Srinath, Shreesha, Ilbeyi, Berkin, Al-Hawaj, Khalid, Batten, Christopher
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	New York, NY, USA ACM 14.10.2017
Schriftenreihe:	ACM Conferences
Schlagworte:	Computer systems organization > Architectures > Parallel architectures > Multicore architectures Computer systems organization > Architectures > Parallel architectures > Single instruction, multiple data Instruction sets Kernel Microarchitecture Microwave integrated circuits Parallel processing Productivity programmable accelerators Software and its engineering > Software notations and tools > Compilers > Runtime environments Task analysis task-parallel programming frameworks work-stealing run-times programmable accelerators work-stealing run-times task-parallel programming frameworks
ISBN:	1450349528, 9781450349529
ISSN:	2379-3155
Online-Zugang:	Volltext
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