A computing origami folding streams in FPGAs

Stream processing represents an important class of applications that spans telecommunications, multimedia and the Internet. The implementation of streaming programs in FPGAs has attracted significant attention because of their inherent parallelism and high performance requirements. Languages, tools,...

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Veröffentlicht in:2009 46th ACM/IEEE Design Automation Conference S. 282 - 287
Hauptverfasser: Hagiescu, Andrei, Wong, Weng-Fai, Bacon, David F., Rabbah, Rodric
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: New York, NY, USA ACM 26.07.2009
IEEE
Schriftenreihe:ACM Conferences
Schlagworte:
Algorithm design and analysis
Delay
Field programmable gate arrays
FPGA
Hardware
Hardware > Electronic design automation > Logic synthesis > Circuit optimization
Internet
Latency
Parallel processing
Process design
Streaming
Streaming media
Telecommunication computing
Throughput
streaming
throughput
FPGA
latency
ISBN:9781605584973, 1605584975
ISSN:0738-100X
Online-Zugang:Volltext
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Abstract Stream processing represents an important class of applications that spans telecommunications, multimedia and the Internet. The implementation of streaming programs in FPGAs has attracted significant attention because of their inherent parallelism and high performance requirements. Languages, tools, and even custom hardware for streaming have been proposed, some of which are commercially available. There are several significant challenges to realizing streaming applications directly in hardware (FPGAs). Since FPGAs have finite resources, there are often many non-trivial tradeoffs between processing throughput and overall latency. In this paper, we describe an algorithm that computes refinements of stream graphs into designs that optimize processing throughput subject to user-specified area and latency constraints.
AbstractList Stream processing represents an important class of applications that spans telecommunications, multimedia and the Internet. The implementation of streaming programs in FPGAs has attracted significant attention because of their inherent parallelism and high performance requirements. Languages, tools, and even custom hardware for streaming have been proposed, some of which are commercially available. There are several significant challenges to realizing streaming applications directly in hardware (FPGAs). Since FPGAs have finite resources, there are often many non-trivial tradeoffs between processing throughput and overall latency. In this paper, we describe an algorithm that computes refinements of stream graphs into designs that optimize processing throughput subject to user-specified area and latency constraints.
Stream processing represents an important class of applications that spans telecommunications, multimedia and the Internet. The implementation of streaming programs in FPGAs has attracted significant attention because of their inherent parallelism and high performance requirements. Languages, tools, and even custom hardware for streaming have been proposed, some of which are commercially available. There are several significant challenges to realizing streaming applications directly in hardware (FPGAs). Since FPGAs have finite resources, there are often many non-trivial tradeoffs between processing throughput and overall latency. In this paper, we describe an algorithm that computes refinements of stream graphs into designs that optimize processing throughput subject to user-specified area and latency constraints.
Author Hagiescu, Andrei
Wong, Weng-Fai
Rabbah, Rodric
Bacon, David F.
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  givenname: David F.
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  givenname: Rodric
  surname: Rabbah
  fullname: Rabbah, Rodric
  organization: IBM T.J. Watson Research Center
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Keywords streaming
throughput
FPGA
latency
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Snippet Stream processing represents an important class of applications that spans telecommunications, multimedia and the Internet. The implementation of streaming...
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StartPage 282
SubjectTerms Algorithm design and analysis
Delay
Field programmable gate arrays
FPGA
Hardware
Hardware -- Electronic design automation -- Logic synthesis -- Circuit optimization
Internet
Latency
Parallel processing
Process design
Streaming
Streaming media
Telecommunication computing
Throughput
Subtitle folding streams in FPGAs
Title A computing origami
URI https://ieeexplore.ieee.org/document/5227148
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