Evaluation of Blue Gene/Q hardware support for transactional memories

This paper describes an end-to-end system implementation of the transactional memory (TM) programming model on top of the hardware transactional memory (HTM) of the Blue Gene/Q (BG/Q) machine. The TM programming model supports most C/C++ programming constructs on top of a best-effort HTM with the he...

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Veröffentlicht in:PACT'12 : proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques, September 19-23, Minneapolis, Minnesota, USA S. 127 - 136
Hauptverfasser: Amy Wang, Gaudet, Matthew, Wu, Peng, Amaral, Jose Nelson, Ohmacht, Martin, Barton, Christopher, Silvera, Raul, Michael, Maged
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: ACM 01.09.2012
Schlagworte:
Benchmark testing
Hardware
Hardware Transactional Memories
Instruction sets
Instruments
Programming
Programming Model
Runtime
Runtime System
Software Support
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Zusammenfassung:This paper describes an end-to-end system implementation of the transactional memory (TM) programming model on top of the hardware transactional memory (HTM) of the Blue Gene/Q (BG/Q) machine. The TM programming model supports most C/C++ programming constructs on top of a best-effort HTM with the help of a complete software stack including the compiler, the kernel, and the TM runtime. An extensive evaluation of the STAMP benchmarks on BG/Q is the first of its kind in understanding characteristics of running coarse-grained TM workloads on HTMs. The study reveals several interesting insights on the overhead and the scalability of BG/Q HTM with respect to sequential execution, coarse-grain locking, and software TM.
DOI:10.1145/2370816.2370836