FPGA in Rough-Granular Computing: Reduct Generation

In this paper we propose a combination of capabilities of the FPGA based device for computing reduct. Presented architecture has been tested on a real-world data. Obtained results confirm the huge acceleration of the computation time using hardware supporting reduct computation in comparison to soft...

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Bibliographic Details

Published in:	2014 IEEE/WIC/ACM International Joint Conferences on Web Intelligence (WI) and Intelligent Agent Technologies (IAT) Vol. 2; pp. 364 - 370
Main Authors:	Kopczynski, Maciej, Grzes, Tomasz, Stepaniuk, Jaroslaw
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01.08.2014
Subjects:	Clocks Digital systems Field programmable gate arrays FPGA Hardware hardware solution Multiplexing Radiation detectors reduct rough set Software
Online Access:	Get full text
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