Architecture-Based Synthesis of 1D-3D Models for Verification and Validation

An architecture-based model-driven design approach, enabled by tools for system synthesis, simulation, and simulation content management, is exploited to efficiently explore design variants at a system level. This paper shows a case study where this design is successfully applied to an aircraft lead...

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Vydáno v:Proceedings / IEEE International Symposium on Distributed Simulation and Real-Time Applications s. 189 - 190
Hlavní autoři: Allegaert, Elias, Lemmens, Yves, Dutre, Stefan, Garro, Alfredo, Inzillo, Marco
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: IEEE 01.09.2016
Témata:
1D-3D models
Aircraft
architectural description
Atmospheric modeling
Computer architecture
cosimulation
Design methodology
modeling
Object oriented modeling
Software
ISSN:1550-6525
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Abstract An architecture-based model-driven design approach, enabled by tools for system synthesis, simulation, and simulation content management, is exploited to efficiently explore design variants at a system level. This paper shows a case study where this design is successfully applied to an aircraft leading-edge slat system. In this case, different variants of design were investigated and compared.
AbstractList An architecture-based model-driven design approach, enabled by tools for system synthesis, simulation, and simulation content management, is exploited to efficiently explore design variants at a system level. This paper shows a case study where this design is successfully applied to an aircraft leading-edge slat system. In this case, different variants of design were investigated and compared.
Author Lemmens, Yves
Allegaert, Elias
Dutre, Stefan
Inzillo, Marco
Garro, Alfredo
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  givenname: Marco
  surname: Inzillo
  fullname: Inzillo, Marco
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SubjectTerms 1D-3D models
Aircraft
architectural description
Atmospheric modeling
Computer architecture
cosimulation
Design methodology
modeling
Object oriented modeling
Software
Title Architecture-Based Synthesis of 1D-3D Models for Verification and Validation
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