Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory

We demonstrate how fine-grained memory protection can be used in support of transactional memory systems: first showing how a software transactional memory system (STM) can be made strongly atomic by using memory protection on transactionally-held state, then showing how such a strongly-atomic STM c...

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Bibliographic Details
Published in:	2008 International Symposium on Computer Architecture pp. 115 - 126
Main Authors:	Baugh, Lee, Neelakantam, Naveen, Zilles, Craig
Format:	Conference Proceeding
Language:	English
Published:	Washington, DC, USA IEEE Computer Society 01.06.2008 IEEE
Series:	ACM Conferences
Subjects:	Abort Handler Computer architecture Computer science Content management Hardware Hardware > Hardware validation Hardware > Integrated circuits > Semiconductor memory Hybrid Memory Protection Primitives Proposals Protection Read-write memory Software performance Software safety Software systems Strong Atomicity Theory of computation > Models of computation > Concurrency Theory of computation > Models of computation > Concurrency > Parallel computing models Transactional Memory Hybrid Transactional Memory Primitives Abort Handler Memory Protection Strong Atomicity
ISBN:	9780769531748, 0769531741
ISSN:	1063-6897
Online Access:	Get full text
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