Baugh, L., Neelakantam, N., & Zilles, C. (2008, June). Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory. 2008 International Symposium on Computer Architecture, 115-126. https://doi.org/10.1109/ISCA.2008.34
Chicago Style (17th ed.) CitationBaugh, Lee, Naveen Neelakantam, and Craig Zilles. "Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory." 2008 International Symposium on Computer Architecture Jun. 2008: 115-126. https://doi.org/10.1109/ISCA.2008.34.
MLA (9th ed.) CitationBaugh, Lee, et al. "Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory." 2008 International Symposium on Computer Architecture, Jun. 2008, pp. 115-126, https://doi.org/10.1109/ISCA.2008.34.