A 1.2nJ/Classification Fully Synthesized All-Digital Asynchronous Wired-Logic Processor Using Quantized Non-Linear Function Blocks in 0.18μm CMOS
A 5.3 times smaller and 2.6 times more energy-efficient all-digital wired-logic processor which infers MNIST with 90.6% accuracy and 1.2nJ of energy consumption has been developed. To improve area efficiency of wired-logic architecture, nonlinear neural network (NNN), which is a neuron and synapse e...
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| Vydáno v: | Proceedings of the 28th Asia and South Pacific Design Automation Conference s. 180 - 181 |
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| Jazyk: | angličtina |
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New York, NY, USA
ACM
16.01.2023
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| Edice: | ACM Conferences |
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| Abstract | A 5.3 times smaller and 2.6 times more energy-efficient all-digital wired-logic processor which infers MNIST with 90.6% accuracy and 1.2nJ of energy consumption has been developed. To improve area efficiency of wired-logic architecture, nonlinear neural network (NNN), which is a neuron and synapse efficient network, and logical compression technology to implement it with area-saving and low-power digital circuits by logic synthesis are proposed, and asynchronous digital combinational circuit DNN hardware has been developed. |
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| AbstractList | A 5.3 times smaller and 2.6 times more energy-efficient all-digital wired-logic processor which infers MNIST with 90.6% accuracy and 1.2nJ of energy consumption has been developed. To improve area efficiency of wired-logic architecture, nonlinear neural network (NNN), which is a neuron and synapse efficient network, and logical compression technology to implement it with area-saving and low-power digital circuits by logic synthesis are proposed, and asynchronous digital combinational circuit DNN hardware has been developed. |
| Author | Hamada, Mototsugu Shiba, Kota Kosuge, Atsutake Sumikawa, Rei Kuroda, Tadahiro |
| Author_xml | – sequence: 1 givenname: Rei surname: Sumikawa fullname: Sumikawa, Rei email: sumikawa@kuroda.t.u-tokyo.ac.jp organization: The University of Tokyo, Tokyo, Japan – sequence: 2 givenname: Kota surname: Shiba fullname: Shiba, Kota organization: The University of Tokyo, Tokyo, Japan – sequence: 3 givenname: Atsutake surname: Kosuge fullname: Kosuge, Atsutake organization: The University of Tokyo, Tokyo, Japan – sequence: 4 givenname: Mototsugu surname: Hamada fullname: Hamada, Mototsugu organization: The University of Tokyo, Tokyo, Japan – sequence: 5 givenname: Tadahiro surname: Kuroda fullname: Kuroda, Tadahiro organization: The University of Tokyo, Tokyo, Japan |
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| Snippet | A 5.3 times smaller and 2.6 times more energy-efficient all-digital wired-logic processor which infers MNIST with 90.6% accuracy and 1.2nJ of energy... |
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| SubjectTerms | Computer systems organization Computer systems organization -- Architectures Computer systems organization -- Architectures -- Other architectures Computer systems organization -- Architectures -- Other architectures -- Neural networks Hardware Hardware -- Emerging technologies Hardware -- Integrated circuits Hardware -- Integrated circuits -- Interconnect Hardware -- Integrated circuits -- Interconnect -- Input -- output circuits Hardware -- Integrated circuits -- Logic circuits Hardware -- Very large scale integration design Hardware -- Very large scale integration design -- Application-specific VLSI designs Hardware -- Very large scale integration design -- Application-specific VLSI designs -- Application specific processors |
| Title | A 1.2nJ/Classification Fully Synthesized All-Digital Asynchronous Wired-Logic Processor Using Quantized Non-Linear Function Blocks in 0.18μm CMOS |
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