An architectural transformation program for optimization of digital systems by multi-level decomposition

Most behavioral synthesis tools perform limited architectural transformations to optimize hardware. In this paper, we present a new architectural transformation scheme that changes the circuit interconnections and the descriptions of constant multipliers. The scheme is based on numerical matrix tran...

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Veröffentlicht in:30th ACM/IEEE Design Automation Conference S. 343 - 348
Hauptverfasser: Chatterjee, Abhijit, Roy, Rabindra K.
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: New York, NY, USA ACM 01.07.1993
Schriftenreihe:ACM Conferences
Schlagworte:
Circuit synthesis
Computing methodologies > Symbolic and algebraic manipulation > Symbolic and algebraic algorithms > Linear algebra algorithms
Control system synthesis
Digital systems
Equations
Flow graphs
Hardware
Hardware > Electronic design automation > Logic synthesis > Circuit optimization
Hardware > Integrated circuits > Logic circuits > Sequential circuits
High level synthesis
Integrated circuit interconnections
Mathematics of computing > Mathematical analysis > Numerical analysis > Computations on matrices
Signal processing algorithms
Silicon compiler
ISBN:9780897915779, 0897915771
ISSN:0738-100X
Online-Zugang:Volltext
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Zusammenfassung:Most behavioral synthesis tools perform limited architectural transformations to optimize hardware. In this paper, we present a new architectural transformation scheme that changes the circuit interconnections and the descriptions of constant multipliers. The scheme is based on numerical matrix transformation algorithms that allow a given matrix to be expressed as the product of several matrices and achieves significant hardware savings over conventional methods.
Bibliographie:SourceType-Conference Papers & Proceedings-1
ObjectType-Conference Paper-1
content type line 25
ISBN:9780897915779
0897915771
ISSN:0738-100X
DOI:10.1145/157485.164923