Polynomial methods for component matching and verification
Component reuse requires designers to determine whether or not an existing component implements desired functionality. If a common structure is used to represent components that are described at multiple levels of abstraction, comparisons between circuit specifications and a library of potential imp...
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| Vydáno v: | Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design s. 678 - 685 |
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| Hlavní autoři: | , |
| Médium: | Konferenční příspěvek Journal Article |
| Jazyk: | angličtina |
| Vydáno: |
New York, NY, USA
ACM
1998
IEEE |
| Edice: | ACM Conferences |
| Témata: | |
| ISBN: | 1581130082, 9781581130089 |
| ISSN: | 1092-3152 |
| On-line přístup: | Získat plný text |
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| Shrnutí: | Component reuse requires designers to determine whether or not an existing component implements desired functionality. If a common structure is used to represent components that are described at multiple levels of abstraction, comparisons between circuit specifications and a library of potential implementations can be performed quickly. A mechanism is presented for compactly specifying circuit functionality as polynomials at the word level. Polynomials can be used to represent circuits that are described at the bit level or arithmetically. Furthermore, in representing components as polynomials, differences in precision between potential implementations can be detected and quantified. |
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| Bibliografie: | SourceType-Scholarly Journals-2 ObjectType-Feature-2 ObjectType-Conference Paper-1 content type line 23 SourceType-Conference Papers & Proceedings-1 ObjectType-Article-3 |
| ISBN: | 1581130082 9781581130089 |
| ISSN: | 1092-3152 |
| DOI: | 10.1145/288548.289115 |

