A comparison of full and partial predicated execution support for ILP processors

One can effectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential benefits of predicated execution are high, the tradeoffs involved in the design of an instruction set to support predicated execution can be difficult. On one...

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Veröffentlicht in:Proceedings 22nd Annual International Symposium on Computer Architecture S. 138 - 150
Hauptverfasser: Mahlke, Scott A., Hank, Richard E., McCormick, James E., August, David I., Hwu, Wen-Mei W.
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: New York, NY, USA ACM 01.05.1995
IEEE
Schriftenreihe:ACM Conferences
Schlagworte:
Computer aided instruction
Concurrent computing
Distributed computing
Hardware
Hardware > Electronic design automation > Methodologies for EDA
Hardware > Integrated circuits > Logic circuits > Arithmetic and datapath circuits
Hardware > Integrated circuits > Logic circuits > Design modules and hierarchy
Impedance
Laboratories
Parallel processing
Permission
Program processors
Software and its engineering > Software notations and tools > Compilers
Software and its engineering > Software notations and tools > Compilers > Source code generation
VLIW
ISBN:9780897916981, 0897916980
ISSN:1063-6897
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Abstract One can effectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential benefits of predicated execution are high, the tradeoffs involved in the design of an instruction set to support predicated execution can be difficult. On one end of the design spectrum, architectural support for full predicated execution requires increasing the number of source operands for all instructions. Full predicate support provides for the most flexibility and the largest potential performance improvements. On the other end, partial predicated execution support, such as conditional moves, requires very little change to existing architectures. This paper presents a preliminary study to qualitatively and quantitatively address the benefit of full and partial predicated execution support. With our current compiler technology, we show that the compiler can use both partial and full predication to achieve speedup in large control-intensive programs. Some details of the code generation techniques are shown to provide insight into the benefit of going from partial to full predication. Preliminary experimental results are very encouraging: partial predication provides an average of 33% performance improvement for an 8-issue processor with no predicate support while full predication provides an additional 30% improvement.
AbstractList One can effectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential benefits of predicated execution are high, the tradeoffs involved in the design of an instruction set to support predicated execution can be difficult. On one end of the design spectrum, architectural support for full predicated execution requires increasing the number of source operands for all instructions. Full predicate support provides for the most flexibility and the largest potential performance improvements. On the other end, partial predicated execution support, such as conditional moves, requires very little change to existing architectures. This paper presents a preliminary study to qualitatively and quantitatively address the benefit of full and partial predicated execution support. With our current compiler technology, we show that the compiler can use both partial and full predication to achieve speedup in large control-intensive programs. Some details of the code generation techniques are shown to provide insight into the benefit of going from partial to full predication. Preliminary experimental results are very encouraging: partial predication provides an average of 33% performance improvement for an 8-issue processor with no predicate support while full predication provides an additional 30% improvement.
Author August, David I.
Mahlke, Scott A.
McCormick, James E.
Hank, Richard E.
Hwu, Wen-Mei W.
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  organization: Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
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Snippet One can effectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential benefits of...
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StartPage 138
SubjectTerms Computer aided instruction
Concurrent computing
Distributed computing
Hardware
Hardware -- Electronic design automation -- Methodologies for EDA
Hardware -- Integrated circuits -- Logic circuits -- Arithmetic and datapath circuits
Hardware -- Integrated circuits -- Logic circuits -- Design modules and hierarchy
Impedance
Laboratories
Parallel processing
Permission
Program processors
Software and its engineering -- Software notations and tools -- Compilers
Software and its engineering -- Software notations and tools -- Compilers -- Source code generation
VLIW
Title A comparison of full and partial predicated execution support for ILP processors
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