An optimal analytical solution for processor speed control with thermal constraints

As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and frequency scaling (DVFS) is a well-known technique for conserving energy. Recently, it has also been used to control the CPU temperature as p...

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Vydáno v:ISLPED '06 : proceedings of the 2006 International Symposium on Low Power Electronics and Design, Tegernsee, Germany, October 4-6, 2006 s. 292 - 297
Hlavní autoři: Rao, Ravishankar, Vrudhula, Sarma, Chakrabarti, Chaitali, Chang, Naehyuck
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: New York, NY, USA ACM 04.10.2006
IEEE
Edice:ACM Conferences
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ISBN:9781595934628, 1595934626
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Abstract As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and frequency scaling (DVFS) is a well-known technique for conserving energy. Recently, it has also been used to control the CPU temperature as part of Dynamic Thermal Management (DTM) techniques. Most works in these areas assume that the optimum speed profile (for either minimizing energy or maximizing performance) is a constant profile. However, in the presence of thermal constraints, we show that the optimal profile is in general, a time-varying function. We formulate the problem of maximizing the average throughput of a processor over a given time period, subject to thermal and speed constraints, as a problem in the calculus of variations. The variational approach provides a powerful framework for precisely specifying and solving the speed control problem, and allows us to obtain an exact analytical solution. The solution methodology is very general, and works for any convex power model, and simple lumped RC thermal models. The resulting speed profiles were found to consist of up to three segments, of which one of them is a decreasing function of time, and the others are constant. We analyze the effect of different parameters like the initial temperature, thermal capacitance and the maximum rated speed on the nature and the cost of the optimum solution. We also propose a two-speed solution that approximates the optimal speed curve. This solution was found to achieve a performance close to that of the optimum, and is also easier to implement in real processors.
AbstractList As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and frequency scaling (DVFS) is a well-known technique for conserving energy. Recently, it has also been used to control the CPU temperature as part of Dynamic Thermal Management (DTM) techniques. Most works in these areas assume that the optimum speed profile (for either minimizing energy or maximizing performance) is a constant profile. However, in the presence of thermal constraints, we show that the optimal profile is in general, a time-varying function. We formulate the problem of maximizing the average throughput of a processor over a given time period, subject to thermal and speed constraints, as a problem in the calculus of variations. The variational approach provides a powerful framework for precisely specifying and solving the speed control problem, and allows us to obtain an exact analytical solution. The solution methodology is very general, and works for any convex power model, and simple lumped RC thermal models. The resulting speed profiles were found to consist of up to three segments, of which one of them is a decreasing function of time, and the others are constant. We analyze the effect of different parameters like the initial temperature, thermal capacitance and the maximum rated speed on the nature and the cost of the optimum solution. We also propose a two-speed solution that approximates the optimal speed curve. This solution was found to achieve a performance close to that of the optimum, and is also easier to implement in real processors.
As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and frequency scaling (DVFS) is a well-known technique for conserving energy. Recently, it has also been used to control the CPU temperature as part of Dynamic Thermal Management (DTM) techniques. Most works in these areas assume that the optimum speed profile (for either minimizing energy or maximizing performance) is a constant profile. However, in the presence of thermal constraints, we show that the optimal profile is in general, a time-varying function. We formulate the problem of maximizing the average throughput of a processor over a given time period, subject to thermal and speed constraints, as a problem in the calculus of variations. The variational approach provides a powerful framework for precisely specifying and solving the speed control problem, and allows us to obtain an exact analytical solution. The solution methodology is very general, and works for any convex power model, and simple lumped RC thermal models. The resulting speed profiles were found to consist of up to three segments, of which one of them is a decreasing function of time, and the others are constant. We analyze the effect of different parameters like the initial temperature, thermal capacitance and the maximum rated speed on the nature and the cost of the optimum solution. We also propose a two-speed solution that approximates the optimal speed curve.
Author Vrudhula, Sarma
Chakrabarti, Chaitali
Chang, Naehyuck
Rao, Ravishankar
Author_xml – sequence: 1
  givenname: Ravishankar
  surname: Rao
  fullname: Rao, Ravishankar
  organization: Arizona State University, Tempe, AZ
– sequence: 2
  givenname: Sarma
  surname: Vrudhula
  fullname: Vrudhula, Sarma
  organization: Arizona State University, Tempe, AZ
– sequence: 3
  givenname: Chaitali
  surname: Chakrabarti
  fullname: Chakrabarti, Chaitali
  organization: Arizona State University, Tempe, AZ
– sequence: 4
  givenname: Naehyuck
  surname: Chang
  fullname: Chang, Naehyuck
  organization: Seoul National University, Seoul, South Korea
BookMark eNqNUMFOAyEQJVETtfbswcuejJdWWGAXjk1j1aSJB_VMWHZI0S2sQGP699K0H-Bc3su8N5OZd43OffCA0C3Bc0IYfySk4byl8wM2jJ6hqWwF4ZJLyppaXKJpSl-4FJW8qekVel_4KozZbfVQaa-HfXam0BSGXXbBVzbEaozBQEqFpRGgr0zwOYah-nV5U-UNxMNwaaYctfM53aALq4cE0xNO0Ofq6WP5Mlu_Pb8uF-uZJpLmmZGCEgLYYqxxy6lhsrfaGtYx2te8NWBl1-PeAAOBgVtRpEYyZlsBWjM6QffHveXAnx2krLYuGRgG7SHskqKECskxL8a7o9EBgBpj-TbuFatbInhd1Iejqs1WdSF8J0WwOsSpTnGqU5zFOv-nVXXRgaV_gL14dQ
ContentType Conference Proceeding
Copyright 2006 ACM
Copyright_xml – notice: 2006 ACM
DBID 6IE
6IL
CBEJK
RIE
RIL
7SC
8FD
JQ2
L7M
L~C
L~D
DOI 10.1145/1165573.1165643
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Xplore POP ALL
IEEE Xplore All Conference Proceedings
IEEE Electronic Library (IEL)
IEEE Proceedings Order Plans (POP All) 1998-Present
Computer and Information Systems Abstracts
Technology Research Database
ProQuest Computer Science Collection
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts – Academic
Computer and Information Systems Abstracts Professional
DatabaseTitle Computer and Information Systems Abstracts
Technology Research Database
Computer and Information Systems Abstracts – Academic
Advanced Technologies Database with Aerospace
ProQuest Computer Science Collection
Computer and Information Systems Abstracts Professional
DatabaseTitleList
Computer and Information Systems Abstracts

Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
EndPage 297
ExternalDocumentID 4271852
Genre orig-research
Conference Paper
GroupedDBID 6IE
6IF
6IK
6IL
6IN
AAJGR
AARBI
ACM
ADPZR
ALMA_UNASSIGNED_HOLDINGS
APO
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
GUFHI
IERZE
OCL
RIE
RIL
AAWTH
LHSKQ
7SC
8FD
JQ2
L7M
L~C
L~D
ID FETCH-LOGICAL-a193t-c98311e0f00a0753c49dfafc4b43d257cef9bd0dce4e80e5f8c4b6944f78eaa43
IEDL.DBID RIE
ISBN 9781595934628
1595934626
IngestDate Thu Jul 10 18:31:23 EDT 2025
Wed Aug 27 02:18:03 EDT 2025
Wed Jan 31 06:36:59 EST 2024
IsPeerReviewed false
IsScholarly true
Keywords temperature
optimal control
DTM
thermal management
DVFS
Language English
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LinkModel DirectLink
MeetingName ISLPED06: International Symposium on Low Power Electronics and Design
MergedId FETCHMERGED-LOGICAL-a193t-c98311e0f00a0753c49dfafc4b43d257cef9bd0dce4e80e5f8c4b6944f78eaa43
Notes SourceType-Conference Papers & Proceedings-1
ObjectType-Conference Paper-1
content type line 25
PQID 31389505
PQPubID 23500
PageCount 6
ParticipantIDs ieee_primary_4271852
proquest_miscellaneous_31389505
acm_books_10_1145_1165573_1165643
acm_books_10_1145_1165573_1165643_brief
PublicationCentury 2000
PublicationDate 20061004
2006-Oct.
20061001
PublicationDateYYYYMMDD 2006-10-04
2006-10-01
PublicationDate_xml – month: 10
  year: 2006
  text: 20061004
  day: 04
PublicationDecade 2000
PublicationPlace New York, NY, USA
PublicationPlace_xml – name: New York, NY, USA
PublicationSeriesTitle ACM Conferences
PublicationTitle ISLPED '06 : proceedings of the 2006 International Symposium on Low Power Electronics and Design, Tegernsee, Germany, October 4-6, 2006
PublicationTitleAbbrev LPE
PublicationYear 2006
Publisher ACM
IEEE
Publisher_xml – name: ACM
– name: IEEE
SSID ssj0000395623
Score 1.7746582
Snippet As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and...
SourceID proquest
ieee
acm
SourceType Aggregation Database
Publisher
StartPage 292
SubjectTerms algorithms
Calculus
Clocks
Computing methodologies -- Modeling and simulation -- Model development and analysis -- Modeling methodologies
DTM
DVFS
Dynamic voltage scaling
Energy consumption
Frequency
General and reference -- Cross-computing tools and techniques -- Performance
Mathematics of computing -- Mathematical analysis -- Mathematical optimization
optimal control
Semiconductor device manufacture
temperature
Temperature control
theory
Theory of computation -- Design and analysis of algorithms -- Mathematical optimization
Thermal management
Throughput
Velocity control
Title An optimal analytical solution for processor speed control with thermal constraints
URI https://ieeexplore.ieee.org/document/4271852
https://www.proquest.com/docview/31389505
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LSwMxEB5a8aAX31ifEQQvrmZN0iRHEcVTFVTwFtLsBATdSh_-fjPptgoK4i1hM8syeczsTL5vAI5LHytR9m1hfbCFNIoXvkRVBKUM7_YrrquYi03oXs88P9v7FpzOsTCImC-f4Rk1cy6_GoQJhcrO5YUmrG8b2lrrKVZrHk_hwpIpJ-yWIrJdmTz1htJp1jcNtU8p1TmxzigtzjL7DEF22j68NRVWfhzL2dbcrPzvK1dh8wu0x-7n5mgNWlivw_I3vsENeLis2V06I978K8tsJDmQzWahMZYcWNYgB1Lr4T29il1N77IzCtiytKiGJExlPnNxifFoE55urh-vboumqkKaBCvGRbBGlCXyyLlP_oII0lbRxyD7UlRpAweMNs1RFVCi4aiiSY-6VsqoDXovxRYs1IMat4GJricGNF2pNJgr4zX6kkjTLoLFJNWBo6RVR78LIzdFQCvXaN41mu_AyZ9jXH_4grEDG6Rs9z6l4XCNnjtwOJstl7YG5Tt8jYPJyAlKwiYPb-d3wV1YyvGUfDNvDxbGwwnuw2L4GL-Mhgd5dX0CB0vISQ
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LaxsxEB4cN5D20odT6r6sQqGXrqO1JK90LKEhJY5rsAO5CVk7AkO9Nn7k90cjr91CAiU3idUsy-gxszP6vgH4mrtQinxqMuO8yaRWPHM5qswrpXl_WvKiDKnYRDEc6ttbM2rA9wMWBhHT5TPsUjPl8suF31Ko7Ez2CsL6HsEzJWUv36G1DhEVLgwZc0JvKaLbldFXr0md9n1dk_vkUp0R74wqRDfxzxBo58j5eV1j5cHBnKzNxcunfecrOP0L22Ojg0F6DQ2s3sCLfxgHWzD-UbHf8ZSYuz8s8ZGkUDbbB8dYdGFZjR2IrfEyvoqd726zMwrZsrisViRMhT5TeYnN-hRuLn5Ozi-zuq5CnAYjNpk3WuQ58sC5ix6D8NKUwQUvp1KUcQt7DCbOUulRouaogo6P-kbKUGh0Toq30KwWFb4DJvqOONCKUsXBXGlXoMuJNq3nDUapNnyJWrX0w7C2Owy0srXmba35Nnz77xg7Xc0wtKFFyrbLHRGHrfXchs5-tmzcHJTxcBUutmsrKA0bfbz3jwt24ORycj2wg1_Dqw_wPEVX0j29j9DcrLb4CY793Wa2Xn1OK-0eoi_LkA
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=Proceedings+of+the+2006+international+symposium+on+Low+power+electronics+and+design&rft.atitle=An+optimal+analytical+solution+for+processor+speed+control+with+thermal+constraints&rft.au=Rao%2C+Ravishankar&rft.au=Vrudhula%2C+Sarma&rft.au=Chakrabarti%2C+Chaitali&rft.au=Chang%2C+Naehyuck&rft.series=ACM+Conferences&rft.date=2006-10-04&rft.pub=ACM&rft.isbn=9781595934628&rft.spage=292&rft.epage=297&rft_id=info:doi/10.1145%2F1165573.1165643
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9781595934628/lc.gif&client=summon&freeimage=true
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9781595934628/mc.gif&client=summon&freeimage=true
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9781595934628/sc.gif&client=summon&freeimage=true