A New Approach to Test Generation and Test Compaction for Scan Circuits

We propose a new approach to test generation and test compaction for scan circuits that eliminates the distinction between scan operations and application of primary input vectors. Under this approach, the scan-in, scan-select and scan-out lines are treated as conventional primary inputs or primary...

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Bibliographic Details
Published in:Design, Automation, and Test in Europe: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1; 03-07 Mar. 2003 p. 11000
Main Authors: Pomeranz, Irith, Reddy, Sudhakar M.
Format: Conference Proceeding
Language:English
Published: Washington, DC, USA IEEE Computer Society 03.03.2003
Series:ACM Conferences
Subjects:
Hardware > Communication hardware, interfaces and storage > Buses and high-speed links
Hardware > Hardware test
Hardware > Integrated circuits > Interconnect > Input > output circuits
Hardware > Robustness
ISBN:0769518702, 9780769518701
ISSN:1530-1591
Online Access:Get full text
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