EPICS: Efficient Parallel Pattern Fault Simulation for Sequential Circuits via Strongly Connected Components

As functional safety of electronic chips gains importance in autonomous vehicles and aerospace, standards like ISO 26262 mandate high diagnostic coverage, requiring extensive gate-level fault simulations. However, for large-scale industrial sequential circuits, these simulations are time-consuming,...

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Bibliographic Details

Published in:	2025 62nd ACM/IEEE Design Automation Conference (DAC) pp. 1 - 7
Main Authors:	Wang, Mingjun, Wang, Hui, Mu, Jianan, Zhang, Xinyu, Sun, Bin, Wen, Yihan, Liu, Zizhen, Gu, Feng, Gao, Jun, Liang, Shengwen, Ye, Jing, Li, Xiaowei, Li, Huawei
Format:	Conference Proceeding
Language:	English
Published:	IEEE 22.06.2025
Subjects:	Circuit faults Computational modeling Integrated circuit modeling Prediction algorithms Predictive models Redundancy Scalability Sequential circuits Timing
Online Access:	Get full text
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