Late Breaking Results: Opera: An Open and Efficient Platform for Data-driven Synthesis of Analog Circuits

The front-end synthesis of analog circuits has been a long-standing challenge since the advent of integrated circuits. Many methods, ranging from conventional optimization-based techniques to emerging learning-based approaches, have been extensively explored to address this challenge. Yet, these met...

Full description

Saved in:
Bibliographic Details
Published in:2025 62nd ACM/IEEE Design Automation Conference (DAC) pp. 1 - 2
Main Authors: Wang, Shikai, Hu, Yaolong, Yi, Zhiqiang, Chi, Taiyun, Cao, Weidong
Format: Conference Proceeding
Language:English
Published: IEEE 22.06.2025
Subjects:
Accuracy
Analog circuits
Benchmark testing
Circuit synthesis
Design automation
Distance measurement
Integrated circuits
Real-time systems
Research and development
Semiconductor process modeling
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:The front-end synthesis of analog circuits has been a long-standing challenge since the advent of integrated circuits. Many methods, ranging from conventional optimization-based techniques to emerging learning-based approaches, have been extensively explored to address this challenge. Yet, these methods are data-driven and often suffer from low design efficiency, due to their heavy reliance on time-consuming circuit simulators, which are frequently used in the synthesis loop for real-time evaluation of the evolving circuit design. In addition, benchmarking these methods is also largely unachievable due to their exclusive use of commercial semiconductor technology for evaluation. This "Late Breaking Results" introduces Opera, an open and efficient platform for the data-driven synthesis of analog circuits. Specifically, Opera develops efficient surrogate models for various circuits and integrates them into open-source OpenAI Gym-like environments to enable efficient synthesis. Case studies on exemplary circuits show that this platform can accelerate the conventional data-driven synthesis flow by up to 40 \times. It also enables the benchmarking of various synthesis methods with standardized environments built upon an open-source semiconductor process.
DOI:10.1109/DAC63849.2025.11132555