Harrow: Synthesis of Optical Logic Circuits via Harmonic Mean and Integer Partition
With the advancement of high-speed and energyefficient optical interconnect and computation, photonic integrated circuits (PICs) have become a promising alternative to traditional CMOS circuits. A PIC can be synthesized by mapping the binary decision diagram (BDD) of target functions to optical swit...
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| Vydané v: | 2025 62nd ACM/IEEE Design Automation Conference (DAC) s. 1 - 7 |
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22.06.2025
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| Abstract | With the advancement of high-speed and energyefficient optical interconnect and computation, photonic integrated circuits (PICs) have become a promising alternative to traditional CMOS circuits. A PIC can be synthesized by mapping the binary decision diagram (BDD) of target functions to optical switches and combiners. However, excessive signal attenuation along the light propagation may require extra optical-electrical signal conversion, thus introducing unwanted delays. In this paper, we aim to overcome this deficiency during logic synthesis: First, we optimize the signal efficiency factor by applying the concept of harmonic means to optimize DC combiners. Second, we eliminate redundant combiners by integer partition. Moreover, we properly arrange these proposed techniques in an optimal sequence of operations to form our main framework. Experimental results show that our framework outperforms the state of the art in terms of efficiency factor. |
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| AbstractList | With the advancement of high-speed and energyefficient optical interconnect and computation, photonic integrated circuits (PICs) have become a promising alternative to traditional CMOS circuits. A PIC can be synthesized by mapping the binary decision diagram (BDD) of target functions to optical switches and combiners. However, excessive signal attenuation along the light propagation may require extra optical-electrical signal conversion, thus introducing unwanted delays. In this paper, we aim to overcome this deficiency during logic synthesis: First, we optimize the signal efficiency factor by applying the concept of harmonic means to optimize DC combiners. Second, we eliminate redundant combiners by integer partition. Moreover, we properly arrange these proposed techniques in an optimal sequence of operations to form our main framework. Experimental results show that our framework outperforms the state of the art in terms of efficiency factor. |
| Author | Jiang, Iris Hui-Ru Chiu, Kai-Hsiang Liang, Jun-Wei |
| Author_xml | – sequence: 1 givenname: Jun-Wei surname: Liang fullname: Liang, Jun-Wei email: asfhiol@gmail.com organization: National Taiwan University,Graduate Institute of Electronics Engineering,Taipei,Taiwan,106319 – sequence: 2 givenname: Iris Hui-Ru surname: Jiang fullname: Jiang, Iris Hui-Ru email: huiru.jiang@gmail.com organization: National Taiwan University,Graduate Institute of Electronics Engineering,Taipei,Taiwan,106319 – sequence: 3 givenname: Kai-Hsiang surname: Chiu fullname: Chiu, Kai-Hsiang email: khchiu168@gmail.com organization: National Taiwan University,Graduate Institute of Electronics Engineering,Taipei,Taiwan,106319 |
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| Snippet | With the advancement of high-speed and energyefficient optical interconnect and computation, photonic integrated circuits (PICs) have become a promising... |
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| SubjectTerms | Attenuation efficiency factor Harmonic analysis harmonic mean High-speed optical techniques integer partition Integrated optics Logic logic synthesis Optical attenuators Optical interconnections Optical switches Photonic integrated circuit Photonic integrated circuits Systematics |
| Title | Harrow: Synthesis of Optical Logic Circuits via Harmonic Mean and Integer Partition |
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