Harrow: Synthesis of Optical Logic Circuits via Harmonic Mean and Integer Partition

With the advancement of high-speed and energyefficient optical interconnect and computation, photonic integrated circuits (PICs) have become a promising alternative to traditional CMOS circuits. A PIC can be synthesized by mapping the binary decision diagram (BDD) of target functions to optical swit...

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Veröffentlicht in:2025 62nd ACM/IEEE Design Automation Conference (DAC) S. 1 - 7
Hauptverfasser: Liang, Jun-Wei, Jiang, Iris Hui-Ru, Chiu, Kai-Hsiang
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: IEEE 22.06.2025
Schlagworte:
Attenuation
efficiency factor
Harmonic analysis
harmonic mean
High-speed optical techniques
integer partition
Integrated optics
Logic
logic synthesis
Optical attenuators
Optical interconnections
Optical switches
Photonic integrated circuit
Photonic integrated circuits
Systematics
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Zusammenfassung:With the advancement of high-speed and energyefficient optical interconnect and computation, photonic integrated circuits (PICs) have become a promising alternative to traditional CMOS circuits. A PIC can be synthesized by mapping the binary decision diagram (BDD) of target functions to optical switches and combiners. However, excessive signal attenuation along the light propagation may require extra optical-electrical signal conversion, thus introducing unwanted delays. In this paper, we aim to overcome this deficiency during logic synthesis: First, we optimize the signal efficiency factor by applying the concept of harmonic means to optimize DC combiners. Second, we eliminate redundant combiners by integer partition. Moreover, we properly arrange these proposed techniques in an optimal sequence of operations to form our main framework. Experimental results show that our framework outperforms the state of the art in terms of efficiency factor.
DOI:10.1109/DAC63849.2025.11132705