Invited: EDA for Heterogeneous Integration - Haque, Emad; Nalla, Pragnya; Sudarshan, Chetan Choppali; Yogi, Divya; Zhang, Hangyu; Chakrabarti, Chaitali; Chhabria, Vidya A.; Harjani, Ramesh; Zhang, Jeff; Sapatnekar, Sachin S. (2025 62nd ACM/IEEE Design Automation Conference (DAC), 2025)
The advent of heterogeneous integration (HI) places new demands on EDA tooling. Building large systems requires (1) methods for chiplet disaggregation that map the system to smaller chiplets, working in conjunction with system-technology co-optimization to determine the right design decisions that optimize computation and communication, together with the choice of substrate and chiplet technologies; (2) multiphysics and multiscale analyses that incorporate thermomechanical aspects into performance analysis, ranging from fast machine-learningdriven analyses in early stages to signoff-quality multiphysics-based analysis; (3) physical design techniques for placing and routing chiplets and embedded active/passive elements on and within the substrate, including the design of thermal and power delivery solutions; and (4) underlying infrastructure required to facilitate HI-based design, including the design and characterization of chiplet libraries and the establishment of data formats and standards. This paper overviews these issues and lays out a set of EDA needs for HI designs.