The synthesis of robust polynomial arithmetic with stochastic logic

As integrated circuit technology plumbs ever greater depths in the scaling of feature sizes, maintaining the paradigm of deterministic Boolean computation is increasingly challenging. Indeed, mounting concerns over noise and uncertainty in signal values motivate a new approach: the design of stochas...

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Vydané v:	2008 45th ACM/IEEE Design Automation Conference s. 648 - 653
Hlavní autori:	Qian, Weikang, Riedel, Marc D.
Médium:	Konferenčný príspevok..
Jazyk:	English
Vydavateľské údaje:	New York, NY, USA ACM 08.06.2008 IEEE
Edícia:	ACM Conferences
Predmet:	Arithmetic Circuits Hardware > Hardware test Hardware > Integrated circuits > Logic circuits > Combinational circuits Hardware > Robustness Logic Polynomial Arithmetic Polynomials Probabilistic Logic Robustness Signal processing Signal synthesis Stochastic Logic Stochastic processes Stochastic resonance Uncertainty probabilistic logic stochastic logic polynomial arithmetic
ISBN:	1605581151, 9781605581156
ISSN:	0738-100X
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