Engineering parallel applications with tunable architectures

Current multicore computers differ in many hardware characteristics. Software developers thus hand-tune their parallel programs for a specific platform to achieve the best performance; this is tedious and leads to non-portable code. Although the software architecture also requires adaptation to achi...

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Bibliographic Details
Published in:2010 ACM/IEEE 32nd International Conference on Software Engineering Vol. 1; pp. 405 - 414
Main Authors: Schaefer, Christoph A., Pankratius, Victor, Tichy, Walter F.
Format: Conference Proceeding
Language:English
Published: New York, NY, USA ACM 01.05.2010
IEEE
Series:ACM Conferences
Subjects:
Computer architecture
Computing methodologies > Parallel computing methodologies > Parallel programming languages
Connectors
Indexing
Parallel processing
Pipelines
Software
Software and its engineering > Software notations and tools > General programming languages > Language features > Patterns
Software and its engineering > Software notations and tools > General programming languages > Language types > Parallel programming languages
Software and its engineering > Software organization and properties > Software system structures > Distributed systems organizing principles > Client-server architectures
Software and its engineering > Software organization and properties > Software system structures > Software architectures
Tuning
ISBN:9781605587196, 1605587192
ISSN:0270-5257
Online Access:Get full text
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Summary:Current multicore computers differ in many hardware characteristics. Software developers thus hand-tune their parallel programs for a specific platform to achieve the best performance; this is tedious and leads to non-portable code. Although the software architecture also requires adaptation to achieve best performance, it is rarely modified because of the additional implementation effort. The Tunable Architectures approach proposed in this paper automates the architecture adaptation of parallel programs and uses an auto-tuner to find the best-performing software architecture for a particular machine. We introduce a new architecture description language based on parallel patterns and a framework to express architecture variants in a generic way. Several case studies demonstrate significant performance improvements due to architecture tuning and show the applicability of our approach to industrial applications. Software developers are exposed to less parallel programming complexity, thus making the approach attractive for experts as well as inexperienced parallel programmers.
ISBN:9781605587196
1605587192
ISSN:0270-5257
DOI:10.1145/1806799.1806859