Trade-off design of analog circuits using goal attainment and "Wave Front" sequential quadratic programming
One of the main tasks in analog design is the sizing of the circuit parameters, such as transistor lengths and widths, in order to obtain optimal circuit performances, such as high gain or low power consumption. In most cases one performance can only be optimized at cost of others, therefore a sizin...
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| Published in: | Proceedings of the conference on Design, automation and test in Europe pp. 75 - 80 |
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| Main Authors: | , , |
| Format: | Conference Proceeding |
| Language: | English |
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San Jose, CA, USA
EDA Consortium
16.04.2007
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| Series: | ACM Conferences |
| Subjects: | |
| ISBN: | 3981080122, 9783981080124 |
| Online Access: | Get full text |
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| Abstract | One of the main tasks in analog design is the sizing of the circuit parameters, such as transistor lengths and widths, in order to obtain optimal circuit performances, such as high gain or low power consumption. In most cases one performance can only be optimized at cost of others, therefore a sizing must aim at an optimal trade-off between the important circuit performances.
In this paper we present a new deterministic method to calculate the complete range of performance trade-offs, the so-called Pareto-optimal front, of a given circuit topology. Known deterministic methods solve a set of constrained multi-objective optimization problems independently of each other. The presented method minimizes a set of Goal Attainment (GA) optimization problems simultaneously. In a parallel algorithm, the individual GA optimization processes compare and exchange their iterative solutions. This leads to a significant improvement in the efficiency and quality of analog trade-off design. |
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| AbstractList | One of the main tasks in analog design is the sizing of the circuit parameters, such as transistor lengths and widths, in order to obtain optimal circuit performances, such as high gain or low power consumption. In most cases one performance can only be optimized at cost of others, therefore a sizing must aim at an optimal trade-off between the important circuit performances.
In this paper we present a new deterministic method to calculate the complete range of performance trade-offs, the so-called Pareto-optimal front, of a given circuit topology. Known deterministic methods solve a set of constrained multi-objective optimization problems independently of each other. The presented method minimizes a set of Goal Attainment (GA) optimization problems simultaneously. In a parallel algorithm, the individual GA optimization processes compare and exchange their iterative solutions. This leads to a significant improvement in the efficiency and quality of analog trade-off design. |
| Author | Mueller, Daniel Graeb, Helmut Schlichtmann, Ulf |
| Author_xml | – sequence: 1 givenname: Daniel surname: Mueller fullname: Mueller, Daniel organization: Institute for Electronic Design Automation, TU Muenchen – sequence: 2 givenname: Helmut surname: Graeb fullname: Graeb, Helmut organization: Institute for Electronic Design Automation, TU Muenchen – sequence: 3 givenname: Ulf surname: Schlichtmann fullname: Schlichtmann, Ulf organization: Institute for Electronic Design Automation, TU Muenchen |
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| DOI | 10.5555/1266366.1266385 |
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| SubjectTerms | Information systems Information systems -- Data management systems Information systems -- Data management systems -- Database administration Information systems -- Data management systems -- Database administration -- Data dictionaries Theory of computation Theory of computation -- Design and analysis of algorithms Theory of computation -- Design and analysis of algorithms -- Mathematical optimization |
| Title | Trade-off design of analog circuits using goal attainment and "Wave Front" sequential quadratic programming |
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