SURF algorithm in FPGA a novel architecture for high demanding industrial applications
Today many industrial applications require object recognition and tracking capabilities. Feature-based algorithms are well-suited for such operations and, among all, Speeded Up Robust Features (SURF) algorithm has been proved to achieve optimal results. However, when high-precision and real time req...
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| Vydané v: | Proceedings of the Conference on Design, Automation and Test in Europe s. 161 - 162 |
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| Hlavní autori: | , , , |
| Médium: | Konferenčný príspevok.. |
| Jazyk: | English |
| Vydavateľské údaje: |
San Jose, CA, USA
EDA Consortium
12.03.2012
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| Edícia: | ACM Conferences |
| Predmet: | |
| ISBN: | 3981080181, 9783981080186 |
| On-line prístup: | Získať plný text |
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| Shrnutí: | Today many industrial applications require object recognition and tracking capabilities. Feature-based algorithms are well-suited for such operations and, among all, Speeded Up Robust Features (SURF) algorithm has been proved to achieve optimal results. However, when high-precision and real time requirements come together, a dedicated hardware is necessary to meet them. In this paper we present a novel architecture for implementing SURF algorithm in FPGA, along with experimental results for different industrial applications. |
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| ISBN: | 3981080181 9783981080186 |
| DOI: | 10.5555/2492708.2492748 |

