Equivalence verification of polynomial datapaths with fixed-size bit-vectors using finite ring algebra
This paper addresses the problem of equivalence verification of RTL descriptions. The focus is on datapath-oriented designs that implement polynomial computations over fixed-size bit-vectors. When the size (m) of the entire datapath is kept constant, fixed-size bit-vector arithmetic manifests itself...
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| Published in: | ICCAD-2005 : International Conference on Computer Aided Design, November 6-10, 2005, DoubleTree Hotel, San Jose, CA pp. 291 - 296 |
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| Main Authors: | , , , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
Washington, DC, USA
IEEE Computer Society
31.05.2005
IEEE ACM |
| Series: | ACM Conferences |
| Subjects: | |
| ISBN: | 078039254X, 9780780392540 |
| Online Access: | Get full text |
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