Výsledky vyhľadávania - unified encryption/decryption architecture

A high performance ST-Box based unified AES encryption/decryption architecture on FPGA Autor Kundi, D.-S., Aziz, Arshad, Ikram, Nassar

“…•A single integrated and symmetric ST-Box structure followed by a single XOR Network is proposed for a unified AES encryptor and decryptor architecture…”
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High Throughput/Gate AES Hardware Architectures Based on Datapath Compression Autor Ueno, Rei, Homma, Naofumi, Morioka, Sumio, Miura, Noriyuki, Matsuda, Kohei, Nagata, Makoto, Bhasin, Shivam, Mathieu, Yves, Graba, Tarik, Danger, Jean-Luc

“… To the best of our knowledge, the proposed architecture has the shortest critical path delay and is the most efficient in terms of throughput per area among conventional AES encryption/decryption…”
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High throughput and resource efficient AES encryption/decryption for SANs Autor Wang, Yi, Ha, Yajun

“…) and Digital Signal Processing (DSP) slices. We also propose a unified architecture for AES encryption and decryption…”
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Image Encryption and Decryption Using Vigenere Cipher with Compute Unified Device Architecture (CUDA) Autor Kusuma, Arjuna Wahyu, Damanhuri, R., Baihaqi, Muhamad Nur, Sanjaya, Labib Habibie

“…Compute Unified Device Architecture (CUDA) adalah Application Programming Interface (API…”
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An application specific instruction set processor (ASIP) for the niederreiter cryptosystem Autor Hu, Jingwei, Dai, Wangchen, Yao, Liu, Cheung, Ray C.C

“… In this work, we provide a unified architecture to achieve efficient Niederreiter digital signature and extend it to perform encryption/decryption on reconfigurable hardware…”
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IMCRYPTO: An In-Memory Computing Fabric for AES Encryption and Decryption Autor Reis, Dayane, Geng, Haoran, Niemier, Michael, Hu, Xiaobo Sharon

“…) encryption and decryption. IMCRYPTO employs a unified structure to implement encryption and decryption in a single-hardware architecture with combined (Inv)SubBytes and (Inv)MixColumns steps…”
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A low-area unified hardware architecture for the AES and the cryptographic hash function Grøstl Autor At, Nuray, Beuchat, Jean-Luc, Okamoto, Eiji, San, Ismail, Yamazaki, Teppei

“…) (encryption, decryption, and key expansion) and the cryptographic hash function Grøstl. Our Arithmetic and Logic Unit has only one instruction that allows for implementing AES encryption, AES decryption, AES key expansion…”
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Homomorphic Encryption and Decryption Hardware Design using Shared Arithmetic and Configurable Butterfly Unit Autor Kim, Seung-Chan, Kim, Dong-Sun

“… Hardware resource optimization is achieved using a unified butterfly architecture and a shared arithmetic in the encryption/decryption process…”
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SUACC-IoT: secure unified authentication and access control system based on capability for IoT Autor Sivaselvan, N., Bhat, K. Vivekananda, Rajarajan, Muttukrishnan, Das, Ashok Kumar, Rodrigues, Joel J. P. C.

“…With the widespread use of Internet of Things (IoT) in various applications and several security vulnerabilities reported in them, the security requirements…”
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A high-speed unified hardware architecture for 128 and 256-bit security levels of AES and the SHA-3 candidate Grøstl Autor Rogawski, Marcin, Gaj, Kris, Homsirikamol, Ekawat

“… and encryption/decryption with relatively small penalty in terms of area and speed when compared to the authentication (original Grøstl circuitry) functionality…”
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Password Recovery for RAR Files Using CUDA Autor Guang Hu, Jianhua Ma, Benxiong Huang

“… Our research focus is on the AES key generation processing, which is the most time consuming stage in the whole RAR encryption/decryption process…”
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Secure breast cancer imaging: A novel advanced generative model encryption approach Autor Inam, Saba, Kanwal, Shamsa, Hajjej, Fahima, Saleh Alluhaidan, Ala

“…The proposed work presents a novel Artificial Intelligence (AI) technique, specifically a Cyclic-Generative Adversarial Network (Cyclic GAN)-based encryption…”
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A low-area unified hardware architecture for the AES and the cryptographic hash function ECHO Autor Beuchat, Jean-Luc, Okamoto, Eiji, Yamazaki, Teppei

“…We propose a compact coprocessor for the AES (encryption, decryption, and key expansion…”
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A Robust Chaos-Based Technique for Medical Image Encryption Autor Yasser, Ibrahim, Khalil, Abeer T., Mohamed, Mohamed A., Samra, Ahmed S., Khalifa, Fahmi

“…) necessitate important prerequisites, such as secrecy, legitimacy, and integrity. This paper recommends a novel hybrid encryption/decryption scheme that can be applied in e-healthcare, or IoHS, for the protection of medical images…”
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Efficient configurations for block ciphers with unified ENC/DEC paths Autor Banik, Subhadeep, Bogdanov, Andrey, Regazzoni, Francesco

“… Depending on the algebraic structure of a given cipher, there may be multiple ways of constructing the combined encryption/decryption circuit, each targeted at optimizing lightweight design metrics…”
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Integration of the AES Cryptography Extension into a RISC-V Architecture Autor Tran, Kelvin

“…). This algorithm contains many rounds of substitution and permutations using a key to ensure secure encryption/decryption…”
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UniStream: A unified stream architecture combining configuration and data processing Autor Jian Yan, Jifang Jin, Ying Wang, Xuegong Zhou, Leong, Philip, Lingli Wang

“…This paper proposes UniStream, a unified stream architecture based on point-to-point stream channels combining both bitstream configuration and data stream processing…”
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Analyzing Secure Memory Architecture for GPUs Autor Yuan, Shougang, Baskara Yudha, Ardhi Wiratama, Solihin, Yan, Zhou, Huiyang

“…Wide adoption of cloud computing makes privacy and security a primary concern. Although recent CPUs have integrated secure memory architecture, such support is still missing for GPUs, a key accelerator in data centers…”
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Low-Delay AES Key Expansion Units Based on DDBT Structure Autor Zheng, Xinxing, Yan, Han, Peng, Zhiwei, Zhang, Xiaoqiang

“… Based on the proposed design method, a low-delay AES encryption key expansion unit and a low-delay AES encryption/decryption unified key expansion unit are designed in this paper…”
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Enhancing Blowfish file encryption algorithm through parallel computing on GPU Autor Mahajan, Tejal, Masih, Shraddha

“…Parallel computing can provide fast execution of the program as compared to sequential computing. Graphical Processing Unit can be used for parallel computing…”
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