Výsledky vyhledávání - processes architectures: multiple data stream architectures ..array and vector processes

US Patent Issued to Rambus on Dec. 21 for "Data Processing Architectures for Packet Handling Wherein Batches of Data Packets of Unpredictable Size are Distributed Across Processing Elements Arranged in a Simd Array Operable to Process Different Respective Packet Protocols at Once While Executing a Single Common Instruction Stream" (British Inventors)

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Capacity of multiple beamformed spatial stream transmission in millimetre-wave communication channels Autor Joon Lee, Seung, Yong Lee, Woo

“… Two kinds of hybrid schemes are considered: the shared antenna architecture, where each antenna processes all spatial streams and the split antenna architecture, where each antenna processes only one spatial stream…”
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Cascaded Stripe Memory Engines for Multi-Scale Object Detection in FPGA Autor Musil, Petr, Juranek, Roman, Musil, Martin, Zemcik, Pavel

“…), and point out shortcomings of existing architectures. SME processes a stream of image data so that it stores a narrow stripe of the input image and its scaled versions…”
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A Mm-Wave Wideband MIMO RX With Instinctual Array-Based Blocker/Signal Management for Ultralow-Latency Communication Autor Huang, Min-Yu, Wang, Hua

“…This article demonstrates a wideband mm-Wave multiple-input-multiple-output (MIMO) receiver (RX) system with cascadable array-based high-order autonomous spatial filters…”
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Neural network learning algorithms for tracking minor subspace in high-dimensional data stream Autor Feng, D.-Z., Zheng, W.-X., Jia, Y.

“…) associated with the smallest eigenvalue of the autocorrelation matrix of the input vector sequence…”
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FPGA architecture and implementation of sparse matrix–vector multiplication for the finite element method Autor Elkurdi, Yousef, Fernández, David, Souleimanov, Evgueni, Giannacopoulos, Dennis, Gross, Warren J.

“… We present an architecture and implementation of an FPGA-based sparse matrix–vector multiplier (SMVM) for use in the iterative solution of large, sparse systems of equations arising from FEM applications…”
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Downlink beamforming through relays: imperfect CSI and coordinated transmission Autor Yi Zheng, Blostein, S.

“… Cooperative relaying is investigated in the following context: a single base station with multiple antennas simultaneously transmits different data streams…”
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IP core implementation of a self-organizing neural network Autor Hendry, D.C., Duncan, A.A., Lightowler, N.

“… Thus, the number of neurons within the single instruction multiple data (SIMD) array, the number of elements per reference vector, and the number of bits of each such element…”
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A Reconfigurable Posit Tensor Unit with Variable-Precision Arithmetic and Automatic Data Streaming Autor Neves, Nuno, Tomás, Pedro, Roma, Nuno

“…). In contrast, this paper proposes a new Reconfigurable Tensor Unit (RTU) which deploys an array of variable-precision Vector Multiply-Accumulate (VMA) units…”
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Resource Optimization of a Parallel Computer for Multiple Vector Processing Autor Hwang, K, Ni, L M

“…) and operating with multiple single-instruction-multiple-data (MSIMD) streams. A formal queueing model is proposed for MSIMD machines used in multiple array processing…”
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Selective Search Architectures and Brute Force Scan Techniques for Summarizing Social Media Posts Autor Wang, Yulu

“… However, the nature of social posts presents challenges for existing search functions. Firstly, as a stream of documents is constantly arriving at a high speed…”
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Automatic Parallelization of Loops with Data Dependent Control Flow and Array Access Patterns Autor Ravishankar, Mahesh

“…With the era of increasing clock speeds coming to an end, parallel computing architectures have now become main-stream…”
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A high performance SIMD framework for design rule checking on Sony's PlayStation 2 Emotion Engine platform [IC layout] Autor Koranne, S.

“…We describe the design and implementation of a high performance floating-point single instruction multiple data (SIMD…”
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Performance Study of SIMD Programming Models on Intel Multicore Processors Autor Kristof, P., Hongtao Yu, Zhiyuan Li, Xinmin Tian

“…Modern multicore hardware employs a variety of parallel execution units, including multiple CPU cores for executing multiple threads simultaneously, vector units such as the Intel SIMD on the CPU…”
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