Výsledky vyhľadávania - parallel field programmable gate array implementation*

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  1. 1

    Parallel field programmable gate array implementation of the sum of absolute differences algorithm used in the stereoscopic system Autor Sejai, Mohamed, Mansouri, Anass, Dosse, Saad Bennani, Ruichek, Yassine

    ISSN: 1693-6930, 2302-9293
    Vydavateľské údaje: Yogyakarta Ahmad Dahlan University 01.12.2022
    Vydané v Telkomnika (01.12.2022)
    “… of the SAD block, and verified by simulation and successfully implemented in Cyclone IV field programmable gate array (FPGA…”
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  2. 2

    Field Programmable Gate Array (FPGA) Implementation of Parallel Jacobi for Eigen-Decomposition in Direction of Arrival (DOA) Estimation Algorithm Autor Zhou, Shuang, Zhou, Li

    ISSN: 2072-4292, 2072-4292
    Vydavateľské údaje: Basel MDPI AG 01.10.2024
    Vydané v Remote sensing (Basel, Switzerland) (01.10.2024)
    “…) estimation algorithms such as subspace classes. Eigen-decomposition using the parallel Jacobi algorithm implemented on FPGA offers excellent parallelism and real-time performance…”
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  3. 3

    Original structure for Walsh–Hadamard transform on sliding window Autor Tisserand, E, Berviller, Y

    ISSN: 0013-5194, 1350-911X, 1350-911X
    Vydavateľské údaje: The Institution of Engineering and Technology 05.11.2015
    Vydané v Electronics letters (05.11.2015)
    “… The proposed algorithm requires 2N−2 additions for each projection. The resources used for a parallel field programmable gate array implementation are presented…”
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  4. 4

    Toward the Optimal Design and FPGA Implementation of Spiking Neural Networks Autor Guo, Wenzhe, Yantir, Hasan Erdem, Fouda, Mohammed E., Eltawil, Ahmed M., Salama, Khaled Nabil

    ISSN: 2162-237X, 2162-2388, 2162-2388
    Vydavateľské údaje: United States IEEE 01.08.2022
    “… This article proposes a parameter optimization scheme for improving the performance of a biologically plausible SNN and a parallel on-field-programmable gate array (FPGA…”
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  5. 5

    FPGA-based implementation of deep neural network using stochastic computing Autor Nobari, Maedeh, Jahanirad, Hadi

    ISSN: 1568-4946, 1872-9681
    Vydavateľské údaje: Elsevier B.V 01.04.2023
    Vydané v Applied soft computing (01.04.2023)
    “… The reconfigurability and parallel nature of field programmable gate array (FPGA) chips make them a preferable platform for SC-based DNN implementation…”
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  6. 6

    Fully Parallel Stochastic Computing Hardware Implementation of Convolutional Neural Networks for Edge Computing Applications Autor Frasser, Christiam F., Linares-Serrano, Pablo, de Rios, Ivan Diez de los, Moran, Alejandro, Skibinsky-Gitlin, Erik S., Font-Rossello, Joan, Canals, Vincent, Roca, Miquel, Serrano-Gotarredona, Teresa, Rossello, Josep L.

    ISSN: 2162-237X, 2162-2388, 2162-2388
    Vydavateľské údaje: United States IEEE 01.12.2023
    “… The proposed architecture solves the challenges that a CNN implementation with SC (SC-CNN) may present, such as the high resources used in binary-to-stochastic conversion…”
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  7. 7

    Parallel implementations of the fast gradient method for high-speed MPC Autor Peyrl, Helfried, Zanarini, Alessandro, Besselmann, Thomas, Liu, Junyi, Boéchat, Marc-Alexandre

    ISSN: 0967-0661, 1873-6939
    Vydavateľské údaje: Elsevier Ltd 01.12.2014
    Vydané v Control engineering practice (01.12.2014)
    “… In particular, scalable and adaptive implementations of gradient-based optimisation methods are presented for both multi-core CPUs and field programmable gate arrays…”
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  8. 8

    Cellular automata implementation of Oregonator simulating light-sensitive Belousov–Zhabotinsky medium Autor Tsompanas, Michail-Antisthenis, Fyrigos, Iosif-Angelos, Ntinas, Vasileios, Adamatzky, Andrew, Sirakoulis, Georgios Ch

    ISSN: 0924-090X, 1573-269X
    Vydavateľské údaje: Dordrecht Springer Netherlands 01.06.2021
    Vydané v Nonlinear dynamics (01.06.2021)
    “…Cellular automata (CA) have been used to simulate a variety of different chemical, biological and physical phenomena. Their ability to emulate complex…”
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  9. 9

    Parallel Doubly Fed Symbol Timing Recovery Algorithm and FPGA Implementation for Burst Broadband Satellite Access Autor Zhang, Nan, Feng, Jinghan, Zhang, Peixin, Gong, Fengkui

    ISSN: 1063-8210, 1557-9999
    Vydavateľské údaje: New York IEEE 01.12.2023
    “…) prefilter is also used to improve the algorithm's anti-self-noise capability. The corresponding field programmable gate array (FPGA…”
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  10. 10

    High-dynamic wavelength tracking and millimeter-level ranging inter-satellite laser communication link with feedback-homodyne detection Autor Tian, Yang, Zhong, Jie, Lin, Xiaoxiang, Xiao, Pei, Yang, Haifeng, Zhong, Yu, Kang, Dongpeng

    ISSN: 1539-4522, 2155-3165, 1539-4522
    Vydavateľské údaje: United States 20.07.2019
    “… In this paper, a system design with a high-sensitivity feedback-homodyne detection scheme and an asynchronous ranging algorithm is demonstrated with real-time field-programmable gate array-implementation (FPGA…”
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  11. 11

    Parallel 2D FFT implementation on FPGA suitable for real-time MR image processing Autor Li, Limin, Wyrwicz, Alice M

    ISSN: 1089-7623, 1089-7623
    Vydavateľské údaje: United States 01.09.2018
    Vydané v Review of scientific instruments (01.09.2018)
    “…) algorithm on a Field Programmable Gate Array (FPGA) for real-time MR image processing. Although a number of architectures of 2D FFT hardware processors…”
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  12. 12

    High-Performance Parallel Implementation of Genetic Algorithm on FPGA Autor Torquato, Matheus F., Fernandes, Marcelo A. C.

    ISSN: 0278-081X, 1531-5878
    Vydavateľské údaje: New York Springer US 01.09.2019
    “… This work proposes a full-parallel implementation of a genetic algorithm on field-programmable gate array (FPGA…”
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  13. 13

    The Modular Modulation Chaotification Map and its Hardware Implementation Autor Liu, Wenhao, Sun, Kehui, Wang, Huihai, Li, Binglun

    ISSN: 0018-9456, 1557-9662
    Vydavateľské údaje: New York IEEE 2024
    “…The application of chaotic systems is constrained by the prevalence of frail chaos, dynamical degradation, and high costs. To solve these issues, we propose a…”
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  14. 14

    Parallel Nonlinear Model Predictive Controller for Real-Time Path Tracking of Autonomous Vehicle Autor Xu, Fang, Zhang, Xu, Chen, Hong, Hu, Yunfeng, Wang, Ping, Qu, Ting

    ISSN: 0278-0046, 1557-9948
    Vydavateľské údaje: New York IEEE 01.12.2024
    “…), this article presents a parallel NMPC controller based on Newton optimization algorithm and field programmable gate array (FPGA…”
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    Complexity Analysis and Efficient Implementations of Bit Parallel Finite Field Multipliers Based on Karatsuba-Ofman Algorithm on FPGAs Autor Gang Zhou, Michalik, Harald, Hinsenkamp, László

    ISSN: 1063-8210, 1557-9999
    Vydavateľské údaje: New York, NY IEEE 01.07.2010
    “…) and on field-programmable gate arrays (FPGAs)] and efficient FPGA implementations of bit parallel mixed Karatsuba-Ofman multipliers (KOM) over GF(2 m…”
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    FPGA-based hardware implementation of chaotic opposition-based arithmetic optimization algorithm Autor Zermani, Mohamed Aymen, Manita, Ghaith, Chhabra, Amit, Feki, Elyes, Mami, Abdelkader

    ISSN: 1568-4946, 1872-9681
    Vydavateľské údaje: Elsevier B.V 01.03.2024
    Vydané v Applied soft computing (01.03.2024)
    “… Our proposed hardware implementation of COAOA harnesses Field-Programmable Gate Arrays (FPGAs) to accelerate optimization processes…”
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  17. 17

    Hybrid analytical model of switched reluctance machine for real-time hardware-in-the-loop simulation Autor Xu, Fengqiu, Dinavahi, Venkata, Xu, Xianze

    ISSN: 1751-8660, 1751-8679, 1751-8679
    Vydavateľské údaje: The Institution of Engineering and Technology 01.07.2017
    Vydané v IET electric power applications (01.07.2017)
    “… The digital hardware implementation of computation components are developed on the field-programmable gate…”
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    SWIFOLD: Smith-Waterman implementation on FPGA with OpenCL for long DNA sequences Autor Rucci, Enzo, Garcia, Carlos, Botella, Guillermo, De Giusti, Armando, Naiouf, Marcelo, Prieto-Matias, Manuel

    ISSN: 1752-0509, 1752-0509
    Vydavateľské údaje: London BioMed Central 20.11.2018
    Vydané v BMC systems biology (20.11.2018)
    “…), Xeon Phi accelerators and Field Programmable Gate Arrays (FGPAs) to speed up large-scale workloads…”
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    FPGA-Based Implementation of Finite Set-MPC for a VSI System Using XSG-Based Modeling Autor Singh, Vijay Kumar, Tripathi, Ravi Nath, Hanamoto, Tsuyoshi

    ISSN: 1996-1073, 1996-1073
    Vydavateľské údaje: Basel MDPI AG 04.01.2020
    Vydané v Energies (04.01.2020)
    “… Field programmable gate array (FPGA) is an alternative and exciting solution for real-time implementation because of the parallel processing capability, as well as, discrete nature of the hardware platform…”
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  20. 20

    FPGA-based real-time implementation of a direct torque control with second-order sliding mode control and input–output feedback linearisation for an induction motor drive Autor Krim, Saber, Gdaim, Soufien, Mtibaa, Abdellatif, Faouzi Mimouni, Mohamed

    ISSN: 1751-8660, 1751-8679, 1751-8679
    Vydavateľské údaje: The Institution of Engineering and Technology 01.03.2020
    Vydané v IET electric power applications (01.03.2020)
    “…A robust direct torque control (DTC) strategy for an induction motor is proposed in this study. In fact, the proposed control strategy is defined by a…”
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