Suchergebnisse - parallel field programmable game array implementation*

A Highly-Parallel and Scalable Hardware Accelerator for the NTest Othello Game Engine von Popa, Stefan, Petric, Vlad, Ivanovici, Mihai

“… We describe its architecture and Field Programmable Gate Array implementation, measure its performance, and compare it with prior solutions …”
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Hardware Architectures for Real-Time Medical Imaging von Alcaín, Eduardo, Fernández, Pedro R., Nieto, Rubén, Montemayor, Antonio S., Vilas, Jaime, Galiana-Bordera, Adrian, Martinez-Girones, Pedro Miguel, Prieto-de-la-Lastra, Carmen, Rodriguez-Vila, Borja, Bonet, Marina, Rodriguez-Sanchez, Cristina, Yahyaoui, Imene, Malpica, Norberto, Borromeo, Susana, Machado, Felipe, Torrado-Carvajal, Angel

“… Medical imaging is considered one of the most important advances in the history of medicine and has become an essential part of the diagnosis and treatment of …”
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Reconfigurable implementation of elliptic curve crypto algorithms von Bednara, M., Daldrup, M., von zur Gathen, J., Shokrollahi, J., Teich, J.

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An FPGA implementation of 3D affine transformations von Bensaali, F., Amira, A., Uzun, I.S., Ahmedsaid, A.

“… ) or visualization applications. This paper investigates the suitability of Field Programmable Gate Array (FPGA …”
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Energy Efficient Parallel and Distributed Simulation von Biswas, Aradhya

“… In mobile systems energy consumption directly impacts battery life. This work focuses on understanding and minimizing power and energy consumption in parallel …”
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A reconfigurable architecture for searching optimal software code to implement block cipher permutation matrices von Kavun, Elif Bilge, Leander, Gregor, Yalcind, Tolga

“… The whole practice turns into a skill game that heavily depends on the personal skills and experience of the programmer …”
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The acceleration of 3D graphics transformations based on CUDA von Sura Nawfal, Fakhrulddin Ali

“… PurposeThe purpose of this paper is to achieve the acceleration of 3D object transformation using parallel techniques such as multi-core central processing unit (MC CPU …”
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A Case Study: Undergraduate Self-Learning in HPC Including OpenMP, MPI, OpenCL, and FPGAs von Jamieson, Peter, Herbordt, Martin, Kinsy, Michel

“… High Performance Computing (HPC) continues to develop and encroach on higher-education in the computing fields …”
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Accelerating Deep Neuroevolution on Distributed FPGAs for Reinforcement Learning Problems von Asseman, Alexis, Antoine, Nicolas, Ozcan, Ahmet S

“… Combined hardware implementation of the game console, image pre-processing and the neural network in an optimized pipeline, multiplied with the system level parallelism enabled the acceleration …”
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Development of Filled Circle Drawing in High-Level Synthesis Oriented Game Programming Library von Yamagata, Yuki, Yamawaki, Akira

“… We are developing a high-level synthesizable software game library to realize high performance and low power mobile terminals executing game applications …”
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Designing a collision detection accelerator on a heterogeneous CPU-FPGA platform von Alves, Fredy Augusto M., Jamieson, Peter, da Silva, Lucas B., Ferreira, Ricardo S., Nacif, Jose Augusto M.

“… These types of algorithms are, typically, critical real-time calculations needed for applications such as simulation, tolerance checking, and video games …”
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Towards Comparing Performance of Algorithms in Hardware and Software von Kirkeby, Maja H, Schoeberl, Martin

“… In this paper, we report on a preliminary investigation of the potential performance gain of programs implemented in field-programmable gate arrays (FPGAs …”
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Solving Sudoku in reconfigurable hardware von Skliarova, I., Vallejo, T., Sklyarov, V.

“… (Field-Programmable Gate Array) on an example of Sudoku game. Three different Sudoku solvers have been fully implemented and tested on a low-cost FPGA of Xilinx Spartan-3E family …”
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Modeling memory resources distribution on multicore processors using games on cellular automata lattices von Tsompanas, Michail-Antisthenis I, Sirakoulis, Georgios Ch, Karafyllidis, Ioannis

“… The proposed model uses the basic concepts of game theory applied to cellular automata lattices and the iterated spatial prisoner's dilemma game …”
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Acceleration of Multi-agent Simulation on FPGAs von Lintao Cui, Jing Chen, Yu Hu, Jinjun Xiong, Zhe Feng, Lei He

“… In this paper, we propose an FPGA-based framework for massive-scale grid-based MAS. Memory interleaving, parallel tasks partition, and computing pipeline are adopted to improve system throughput …”
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Parallel Brutus: the first distributed, FPGA accelerated chess program von Donninger, C., Kure, A., Lorenz, U.

“… It is now possible to develop fine grained parallel applications without long-lasting chip design cycles …”
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Population-Based FPGA Solution to Mastermind Game von Ugurdag, H.F., Sahin, Y., Baskirt, O., Dedeoglu, S., Goren, S., Kocak, Y.S.

“… We present a new parallel, adaptable algorithm, which plays Mastermind game, and its FPGA implementation …”
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