Search Results - algorithms and (architekture OR architecture) for parallel processing

Evaluation of parallel particle swarm optimization algorithms within the CUDA™ architecture by Mussi, Luca, Daolio, Fabio, Cagnoni, Stefano

“…), which are, in fact, massively parallel processing architectures. In this paper we discuss possible approaches to parallelizing PSO on graphics hardware within the Compute Unified Device Architecture (CUDA…”
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An Alpha-Tree Algorithm for Massively Parallel Architectures by Carlinet, Edwin, Kaci, Quentin, Blin, Nicolas

“… In this paper, we propose the first massively parallel alpha-tree algorithm that leverages concurrent union-find data structures to exploit the SIMT…”
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Parallel and accurate k‐means algorithm on CPU‐GPU architectures for spectral clustering by He, Guanlin, Vialle, Stephane, Baboulin, Marc

“… We propose parallel optimization techniques for the k‐means algorithm on CPU and GPU. Particularly we use a two…”
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Auto-GNAS: A Parallel Graph Neural Architecture Search Framework by Chen, Jiamin, Gao, Jianliang, Chen, Yibo, Oloulade, Babatounde Moctard, Lyu, Tengfei, Li, Zhao

“… Graph neural architecture search effectively constructs the GNNs that achieve the expected model performance with the rise of automatic machine learning…”
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Max-PIM: Fast and Efficient Max/Min Searching in DRAM by Zhang, Fan, Angizi, Shaahin, Fan, Deliang

“… In this work, for the first time, we propose a novel 'Min/Max-in-memory' algorithm based on iterative XNOR bit-wise comparison, which supports parallel inmemory searching for minimum and maximum…”
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PV to Virtual Bus Parallel Differential Power Processing Architecture for Photovoltaic Systems by Nazer, Afshin, Isabella, Olindo, Manganiello, Patrizio

“…This article introduces an innovative parallel differential power processing (PDPP) architecture designed to mitigate the effect of mismatch among photovoltaic…”
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A flexible algorithm for calculating pair interactions on SIMD architectures by Páll, Szilárd, Hess, Berk

“… In order to reach high performance on modern CPU and accelerator architectures, single-instruction multiple-data (SIMD…”
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Skywalker: Efficient Alias-Method-Based Graph Sampling and Random Walk on GPUs by Wang, Pengyu, Li, Chao, Wang, Jing, Wang, Taolei, Zhang, Lu, Leng, Jingwen, Chen, Quan, Guo, Minyi

“…Graph sampling and random walk operations, capturing the structural properties of graphs, are playing an important role today as we cannot directly adopt computing-intensive algorithms on large-scale graphs…”
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Practical Implementation of Multichannel Filtered-x Least Mean Square Algorithm Based on the Multiple-Parallel-Branch With Folding Architecture for Large-Scale Active Noise Control by Shi, Dongyuan, Gan, Woon-Seng, He, Jianjun, Lam, Bhan

“… The feedforward multichannel filtered-x least mean square (FFMCFxLMS) algorithm is commonly used to dynamically adjust the transfer function of the multichannel controllers for different noise environments…”
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Parallel Pipelined Architecture and Algorithm for Matrix Transposition Using Registers by Zhang, Bo, Ma, Zhenguo, Luo, Wei

“…In this brief, we present a new algorithm and architecture for continuous-flow matrix transposition using registers…”
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Neural Speech Phase Prediction Based on Parallel Estimation Architecture and Anti-Wrapping Losses by Ai, Yang, Ling, Zhen-Hua

“… The proposed model is a cascade of a residual convolutional network and a parallel estimation architecture…”
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cuFSDAF: An Enhanced Flexible Spatiotemporal Data Fusion Algorithm Parallelized Using Graphics Processing Units by Gao, Huan, Zhu, Xiaolin, Guan, Qingfeng, Yang, Xue, Yao, Yao, Zeng, Wen, Peng, Xuantong

“…) algorithm is suitable for heterogeneous landscapes and capable of capturing abrupt land-cover changes…”
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InnerSP: A Memory Efficient Sparse Matrix Multiplication Accelerator with Locality-Aware Inner Product Processing by Baek, Daehyeon, Hwang, Soojin, Heo, Taekyung, Kim, Daehoon, Huh, Jaehyuk

“… To mitigate the memory access overheads, recent accelerator designs advocated the outer product processing which minimizes input accesses but generates intermediate products to be merged to the final output matrix…”
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New parallel computing algorithm of molecular dynamics for extremely huge scale biological systems by Jung, Jaewoon, Kobayashi, Chigusa, Kasahara, Kento, Tan, Cheng, Kuroda, Akiyoshi, Minami, Kazuo, Ishiduki, Shigeru, Nishiki, Tatsuo, Inoue, Hikaru, Ishikawa, Yutaka, Feig, Michael, Sugita, Yuji

“…In this paper, we address high performance extreme‐scale molecular dynamics (MD) algorithm in the GENESIS software to perform cellular…”
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MoDL: Model-Based Deep Learning Architecture for Inverse Problems by Aggarwal, Hemant K., Mani, Merry P., Jacob, Mathews

“…)-based regularization prior. The proposed formulation provides a systematic approach for deriving deep architectures for inverse problems with the arbitrary structure…”
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Parallel Implementation of Key Algorithms for Intelligent Processing of Graphic Signal Data of Consumer Digital Equipment by Huang, Changbing, Li, Ruibo, Li, Aiping

“… The purpose of this paper is to process the graphic signal data in enterprise digital equipment and improve the efficiency of algorithm task processing in the system…”
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IMAGING: In-Memory AlGorithms for Image processiNG by Haj-Ali, Ameer, Ben-Hur, Rotem, Wald, Nimrod, Ronen, Ronny, Kvatinsky, Shahar

“…Data-intensive applications such as image processing suffer from massive data movement between memory and processing units…”
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An Ising Model-Based Parallel Tempering Processing Architecture for Combinatorial Optimization by Zhang, Yang, Wang, Xiangrui, Fan, Gaopeng, Cao, Yuan, Liu, Yiqiu, Yang, Yongkui, Yao, Enyi

“… This article presents a novel parallel tempering processing architecture (PTPA) based on the fully connected Ising model to address these issues…”
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Splitwise: Efficient Generative LLM Inference Using Phase Splitting by Patel, Pratyush, Choukse, Esha, Zhang, Chaojie, Shah, Aashaka, Goiri, Inigo, Maleki, Saeed, Bianchini, Ricardo

“…Generative large language model (LLM) applications are growing rapidly, leading to large-scale deployments of expensive and power-hungry GPUs. Our…”
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High-Throughput Non-Binary LDPC Decoder Architecture Using Parallel EMS Algorithm by Choe, Jeongwon, Lee, Youngjoo

“…) decoding algorithm that reduces the processing latency of each iteration by managing multiple message entries at a time…”
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