Výsledky vyhledávání - algorithm-architecture adequation

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    Field programmable gate array implementation of variable-bins high efficiency video coding CABAC decoder with path delay optimisation Autor Menasri, Wahiba, Skoudarli, Abdellah, Belhadj, Aichouche, Azzaz, Mohamed Salah

    ISSN: 1751-9659, 1751-9667
    Vydáno: The Institution of Engineering and Technology 01.05.2019
    Vydáno v IET image processing (01.05.2019)
    “… In this work, an algorithm-architecture adequation is proposed to implement a CABAC decoder on a field programmable gate array…”
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    Light speed labeling: efficient connected component labeling on RISC architectures Autor Lacassagne, Lionel, Zavidovique, Bertrand

    ISSN: 1861-8200, 1861-8219
    Vydáno: Berlin/Heidelberg Springer-Verlag 01.06.2011
    Vydáno v Journal of real-time image processing (01.06.2011)
    “…This article introduces two fast algorithms for connected component Labeling of binary images, a peculiar case of coloring. The first one, Selkow DT is…”
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    Explicit routing schemes for implementation of cellular automata on processor arrays Autor Millo, Jean-Vivien, de Simone, Robert

    ISSN: 1567-7818, 1572-9796
    Vydáno: Dordrecht Springer Netherlands 01.09.2013
    Vydáno v Natural computing (01.09.2013)
    “…Massively parallel processor array (MPPA) architectures are becoming widely available computing platforms. Because of formal similarities, they are good…”
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    Hardware Integration of a Neural Network onto FPGA and its Application to Sound Source Localization Autor Holmes, Emily, Loubet, Gael, Danes, Patrick, Dragomirescu, Daniela

    ISSN: 2995-0589
    Vydáno: IEEE 18.11.2024
    “…Sound Source Localization algorithms estimate the Direction of Arrival of one or multiple (moving) sound sources in a 3-D space. Potential applications include…”
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    Massively parallel computing systems with real time constraints: the "Algorithm Architecture Adequation" methodology Autor Sorel, Y.

    ISBN: 9780818663222, 0818663227
    Vydáno: IEEE Comput. Soc. Press 1994
    “… We present a methodology called "Algorithm Architecture Adequation" used to take advantage of the computation power of these systems in the case of real-time applications…”
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    Optimized Design Methodology for an Integration of Electrical Control Systems Autor Kebbati, Y., Souffi, H.K.

    ISBN: 9781424410200, 1424410207
    ISSN: 0840-7789
    Vydáno: IEEE 01.04.2007
    “… Thus, they were based on two concepts: modular design and algorithm architecture "adequation…”
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    FPGA-Based modelling and embedded real-time simulation of low-voltage DC distribution system with multiple DESs Autor Wang, Shouxiang, Zhang, Chunyu, Zhao, Qianyu

    ISSN: 0378-7796
    Vydáno: Elsevier B.V 01.08.2025
    Vydáno v Electric power systems research (01.08.2025)
    “…•An FPGA-based embedded real-time simulator for a LVDC distribution system is developed.•The underlying operations have been fully factorized to save hardware…”
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    Implementation of an LVQ neural network with a variable size: algorithmic specification, architectural exploration and optimized implementation on FPGA devices Autor Boubaker, Mohamed, Akil, Mohamed, Ben Khalifa, Khaled, Grandpierre, Thierry, Bedoui, Mohamed Hedi

    ISSN: 0941-0643, 1433-3058
    Vydáno: London Springer-Verlag 01.03.2010
    Vydáno v Neural computing & applications (01.03.2010)
    “…, “Algorithm Architecture Adequation”. Using graph transformations, it allows the generation of an optimized circuit implementation at the Register Transfer Level (RTL…”
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    Integration of Optimization Approach Based on Multiple Wordlength Operation Grouping in the AAA Methodology for Real-Time Systems: LVQ Implementation Autor Blaiech, Ahmed Ghazi, Ben Khalifa, Khaled, Boubaker, Mohamed, Akil, Mohamed, Bedoui, Mohamed Hedi

    ISSN: 1947-3176, 1947-3184
    Vydáno: Hershey IGI Global 01.01.2014
    “…). By fixing the precision constraint, this approach allows minimizing the data wordlength. In this paper, the authors present the integration of the approach based on the MWOG in the Algorithm Architecture Adequation (AAA…”
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    Sensibilisation au développement d’accélérateurs matériels sur FPGA Autor Le Gal, B., Dallet, D.

    ISSN: 1638-5705, 1638-1963, 1638-5705
    Vydáno: Les Ulis EDP Sciences 01.01.2012
    “…Les applications liées au traitement du signal et à la vidéo sont propices pour la mise en exergue des besoins d’implantation de certaines fonctions sous forme…”
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    Design and Construction of a Low Cost All-Digital Phase Locked Loop Based on Field Programmable Gate Array Autor Zhang, Chunyu, Wang, Shouxiang, He, Ruxun, Zhao, Qianyu, Wang, Kai

    ISSN: 1742-6588, 1742-6596
    Vydáno: Bristol IOP Publishing 01.07.2021
    Vydáno v Journal of physics. Conference series (01.07.2021)
    “… Meanwhile, an improved simulation architecture construction method based on Algorithm Architecture Adequation (A-A-A…”
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    Workload Partitioning of a Bio-inspired Simultaneous Localization and Mapping Algorithm on an Embedded Architecture Autor Mounir, Amraoui, Rachid, Latif, Ouardi, Abdelhafid El, Tajer, Abdelouahed

    ISSN: 2158-107X, 2156-5570
    Vydáno: West Yorkshire Science and Information (SAI) Organization Limited 2021
    “…Many algorithms were developed to perform visual localization and mapping (SLAM) for robotic applications. These algorithms used monocular or stereovision…”
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    Partial and dynamic reconfiguration of FPGAs: a top down design methodology for an automatic implementation Autor Berthelot, F., Nouvel, F.

    ISBN: 0769525334, 9780769525334
    ISSN: 2159-3469
    Vydáno: IEEE 01.06.2006
    “… This paper concentrates on how to take into account specificities of partially reconfigurable components during the high level adequation algorithm architecture process…”
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    Integration of Optimization Approach Based on Multiple Wordlength Operation Grouping in the AAA Methodology for Real-Time Systems Autor Blaiech, Ahmed Ghazi, Ben Khalifa, Khaled, Boubaker, Mohamed, Akil, Mohamed, Bedoui, Mohamed Hedi

    ISSN: 1947-3176, 1947-3184
    Vydáno: IGI Global 01.01.2014
    “…). By fixing the precision constraint, this approach allows minimizing the data wordlength. In this paper, the authors present the integration of the approach based on the MWOG in the Algorithm Architecture Adequation (AAA…”
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    Journal Article
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    Optimized rapid prototyping for real-time embedded heterogeneous multiprocessors Autor Grandpierre, T., Lavarenne, C., Sorel, Y.

    ISBN: 9781581131321, 1581131321
    ISSN: 1092-6100
    Vydáno: New York, NY, USA ACM 01.03.1999
    “…This paper presents an enhancement of our "Algorithm Architecture Adequation" (AAA) prototyping methodology which allows to rapidly develop and optimize…”
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    Toward a Low Cost and Single Chip Holter: SoC-Holter Autor Ding, Hao, Hou, Kun-mean, Lecoq, Jacques, Bohner, Gerard, Zhou, Hai-ying, Sun, Hong

    ISSN: 1796-2056, 1796-2056
    Vydáno: Oulu Academy Publisher 01.02.2011
    Vydáno v Journal of networks (01.02.2011)
    “…~4 leads ECG. This single chip SoC-Holter is relied on adequation algorithm architecture design methodology…”
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    An adaptive parallel system dedicated to projective image matching Autor Pissaloux, E.E., Le Coat, F., Tissot, A., Durbin, F.

    ISBN: 0780362977, 9780780362970
    ISSN: 1522-4880
    Vydáno: IEEE 2000
    “… (A/sup 3/C-algorithm-architecture adequation under constraints)…”
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