Search Results - Synthesis and Optimization of DSP Algorithms

Synthesis and optimization of DSP algorithms by Constantinides, George A, Cheung, Peter Y. K, Luk, Wayne

“…Synthesis and Optimization of DSP Algorithms describes approaches taken to synthesising structural hardware descriptions of digital circuits from high-level descriptions of Digital Signal Processing (DSP) algorithms. The book contains…”
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A unified System C-based framework for simulation, optimization and synthesis of complex systems implementing DSP algorithms by Cardarilli, G.C., Malatesta, A., Re, M., Arnone, L., Rosti, A.

“…This paper proposes a methodology for fast design-to-synthesis flow. We want to promote an improvement to the currently used methodology, which is based on functional design, refinement, HDL implementation and logic synthesis…”
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A New HLS Allocation Algorithm for Efficient DSP Utilization in FPGAs by Mami, Sonia, Lahbib, Younes, Mami, Abdelkader

“…In this paper, an algorithm of allocation for FPGA dedicated HLS flow is proposed…”
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DSP design protection in CE through algorithmic transformation based structural obfuscation by Sengupta, Anirban, Roy, Dipanjan, Mohanty, Saraju P., Corcoran, Peter

“…) cores used in an electronic system-on-chip (SoC). In this work a novel structural obfuscation methodology for protecting a digital signal processor (DSP…”
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The Concept of Self-Adaptive Dynamic Reconfiguration in FPGA-Based DSP Systems by Gołka, Łukasz, Poczekajło, Paweł, Suszyński, Robert

“… Applications of DPR are proposed for the implementation of Fast Fourier Transform (FFT), adaptive filtering, and sound signal synthesis, where the choice of algorithm…”
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Physically Aware Affinity-Driven Multiplier Implementation by Maltabashi, Or, Kra, Yehuda, Teman, Adam

“… These arithmetic blocks are often implemented with the parallel fused DP (FDP) approach, and to achieve high performance, are realized with a tree-based compression algorithm, using on commercially available synthesis macros…”
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Hybrid multi-objective optimization of µ-synthesis robust controller for frequency regulation in isolated microgrids by Mohammed, Abdallah, Kadry, Ahmed, Abo-Adma, Maged, Samahy, Adel El, Elazab, Rasha

“… The controller is optimized using multi-objective particle swarm optimization (MOPSO) and multi-objective genetic algorithm (MOGA…”
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A multi structure genetic algorithm for integrated design space exploration of scheduling and allocation in high level synthesis for DSP kernels by Sengupta, Anirban, Sedaghat, Reza, Sarkar, Pallabi

“…This paper presents an integrated design space exploration of scheduling and allocation problem in high level synthesis using the heuristic based multi structure genetic algorithm…”
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Application of symbolic computer algebra in high-level data-flow synthesis by Peymandoust, A., De Micheli, G.

“… Unfortunately, most high-level synthesis tools and methods cannot automatically synthesize data paths such that complex arithmetic library blocks are intelligently used…”
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Multilevel optimization of speech coding algorithms for modern DSP architectures by Awan, M.T., Masud, S., Khan, N., Abdullah, F.

“…Real-time implementation of speech coding algorithm requires the DSP code to be highly optimized and the underlying hardware to be fast…”
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Low Area and High Throughput Architectures of FIR Filter for Data Streaming DSP Applications by Vucha, Mahendra, Rao, Koppula Srinivas, Arun, V

“… This can be achieved by design of hardware architectures for DSP algorithms and apply design optimization techniques to accelerate the throughput and minimize area…”
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Efficient hardware‐accelerated pseudoinverse computation through algorithm restructuring for parallelization in high‐level synthesis by Tan, Chong Yeam, Ooi, Chia Yee, Choo, Hau Sim, Ismail, Nordinah

“…Summary This paper describes a fast and efficient hardware‐accelerated pseudoinverse computation through algorithm restructuring and leveraging FPGA synthesis directives for parallelism prior to high‐level synthesis (HLS…”
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Application-Specific Instruction-Set Processor for Retinex-Like Image and Video Processing by Saponara, S., Fanucci, L., Marsi, S., Ramponi, G., Kammler, D., Witte, E.M.

“… Design optimizations are addressed at algorithmic and architectural levels, the latter including a dedicated memory structure, an adapted pipeline, bypasses, a custom address generator and special looping structures…”
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Precision-wise architectural synthesis of DSP circuits by Caffarena, Gabriel, Carreras, Carlos

“…This paper addresses the combination of wordlength optimization and architectural synthesis as a single design task, aiming at reducing the area of FPGA implementations…”
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Firmware implementation of a recurrent neural network for the computation of the energy deposited in the liquid argon calorimeter of the ATLAS experiment by Aad, G., Calvet, T., Chiedde, N., Faure, R., Fortin, E.M., Laatu, L., Monnier, E., Sur, N.

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Low-complexity implementation of state-space structures in linear DSP synthesis by Vijay, S.

“… In this paper, a highly efficient common subexpression elimination (CSE) algorithm based on the binary representation of the system matrices to optimize the hardware requirements in linear Digital Signal Processing (DSP…”
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FPGA Implementation of Data Flow Graphs for Digital Signal Processing Applications by Al-Zu'bi, Hala, Al-Khaleel, Osama, Shatnawi, Ali

“… These operations should be time scheduled and hardware allocated. This paper proposes a new scheduling technique for digital signal processing (DSP…”
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Optimizing Scheduling and Intercluster Connection for Application-Specific DSP Processors by Cathy Qun Xu, Chun Jason Xue, Jingtong Hu, Sha, E.H.-M.

“…Signal processing applications have high instruction level parallelism (ILP) and real-time performance requirements. Embedded and application specific…”
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A neural network accelerated optimization method for FPGA by Hu, Zhengwei, Zhu, Sijie, Wang, Leilei, Cao, Wangbin, Xie, Zhiyuan

“…A neural network accelerated optimization method for FPGA hardware platform is proposed…”
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A Symbolic Noise Analysis Approach to Word-Length Optimization in DSP Hardware by Ahmadi, A., Zwolinski, M.

“… A symbolic-noise analysis method is introduced for high-level synthesis of DSP algorithms in digital hardware, together with a vector evaluated genetic algorithm for multiple objective optimization…”
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