Výsledky vyhľadávania - Processors architectures: multiple data stream architectures ..Array and vector processors

WIPO PUBLISHES PATENT OF MIPS TECHNOLOGIES FOR "VECTOR SIZE AGNOSTIC SINGLE INSTRUCTION MULTIPLE DATA (SIMD) PROCESSOR ARCHITECTURE" (AMERICAN INVENTOR)

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A Hybrid RF/Baseband Precoding Processor Based on Parallel-Index-Selection Matrix-Inversion-Bypass Simultaneous Orthogonal Matching Pursuit for Millimeter Wave MIMO Systems Autor Lee, Yun-Yueh, Wang, Ching-Hung, Huang, Yuan-Hao

“… Furthermore, the link performance can be improved by adopting precoding technology in multiple data stream transmission…”
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AXI-Pack: Near-Memory Bus Packing for Bandwidth-Efficient Irregular Workloads Autor Zhang, Chi, Scheffler, Paul, Benz, Thomas, Perotti, Matteo, Benini, Luca

“…Data-intensive applications involving irregular memory streams are inefficiently handled by modern processors and memory systems highly optimized for regular, contiguous data…”
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Scalable processor core for high-speed pattern matching architecture on FPGA Autor Alyushin, A. V., Alyushin, S. A., Arkhangelsky, V. G.

“… We suggest scalable processor core with heterogeneous cluster architecture. Experimental results show that the proposed architecture has advantages over the previously…”
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OPSILA: a vector and parallel processor Autor Boeri, F., Auguin, M.

“… The operating modes are the vector single-instruction multiple-data (SIMD) mode and the parallel single program stream, multiple data stream (SPMD) mode…”
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IP core implementation of a self-organizing neural network Autor Hendry, D.C., Duncan, A.A., Lightowler, N.

“… Thus, the number of neurons within the single instruction multiple data (SIMD) array, the number of elements per reference vector, and the number of bits of each such element…”
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COMBINING BACKGROUND MEMORY MANAGEMENT AND REGULAR ARRAY CO-PARTITIONING, ILLUSTRATED ON A FULL MOTION ESTIMATION KERNEL Autor SCHAFFER, RAINER, CATTHOOR, FRANCKY, MERKER, RENATE

“…In this paper an approach is presented to combine the design of background memory architectures and processor arrays for data dominated real-time applications…”
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A survey of synchronization methods for parallel computers Autor Dinning, A.

“… (multiple-instruction multiple-data-stream) multiprocessors. She provides an overview of MIMD multiprocessing and goes on to discuss semaphore-based implementations…”
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Synchronizing a high-speed SIMD processor array Autor Lund, S., Bengtsson, L.

“…A synchronization method for a high speed scalable SIMD (Single instruction stream Multiple Data stream…”
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Reconfigurable Stream-based Tensor Unit with Variable-Precision Posit Arithmetic Autor Neves, Nuno, Tomas, Pedro, Roma, Nuno

“…). In contrast, this paper proposes a new Reconfigurable Tensor Unit (RTU) which deploys an array of variable-precision Vector MultiplyAccumulate (VMA) units…”
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Computing the Hough transform on a scan line array processor (image processing) Autor Fisher, A.L., Highnam, P.T.

“… (single-instruction, multiple-data-stream) vector of processors is described. The authors show that a high-precision transform, usually considered to be an…”
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Coherent spatio-temporal sensor fusion on a hybrid multicore processor system Autor Kotas, C., Ponce, E., Williams, H., Barhen, J.

“… This scheme involves coherent spatio-temporal fusion of data streams from multiple sensors, leading to the derivation of LLR detection statistics…”
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Performance Study of SIMD Programming Models on Intel Multicore Processors Autor Kristof, P., Hongtao Yu, Zhiyuan Li, Xinmin Tian

“…Modern multicore hardware employs a variety of parallel execution units, including multiple CPU cores for executing multiple threads simultaneously, vector units such as the Intel SIMD on the CPU…”
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Efficient parallel algorithms and VLSI architectures for manipulator Jacobian computation Autor Yeung, T.B., Lee, C.S.G.

“…) on uniprocessor computers and of order O(log/sub 2/ N) on both single-instruction-stream-multiple-data-stream (SIMD…”
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General-purpose systolic arrays Autor Johnson, K.T., Hurson, A.R., Shirazi, B.

“… (single-instruction stream, multiple-data stream), MIMD (multiple-instruction stream, multiple-data stream…”
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Selective Search Architectures and Brute Force Scan Techniques for Summarizing Social Media Posts Autor Wang, Yulu

“… However, the nature of social posts presents challenges for existing search functions. Firstly, as a stream of documents is constantly arriving at a high speed…”
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Performance of cached DRAM organizations in vector supercomputers Autor Hsu, W.-C., Smith, J. E.

“… In particular, we consider systems where processors have no internal data caches and memory reference streams are generated by vector instructions…”
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Automatic Parallelization of Loops with Data Dependent Control Flow and Array Access Patterns Autor Ravishankar, Mahesh

“…With the era of increasing clock speeds coming to an end, parallel computing architectures have now become main-stream…”
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A vector memory system based on wafer-scale integrated memory arrays Autor Chiueh, T.-C.

“… Using WIMA modules as the basic building blocks, a high-bandwidth, low latency, and low cost vector memory system is developed that supports parallelism among multiple vector access streams…”
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Supercomputers: Influencing Tomorrow's General-Purpose Hardware Autor Gitomer, Jerry

“…By studying state-of-the-art supercomputers, MIS managers can estimate the state of the typical commercial data processing installation five to ten years from now…”
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