Suchergebnisse - Loop Level Parallelization

INTERNATIONAL PATENT: MYNATIX LTD FILES APPLICATION FOR "HIGH-PERFORMANCE CODE PARALLELIZATION COMPILER WITH LOOP-LEVEL PARALLELIZATION"

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Multiple execution of the same MPI application: exploiting parallelism at hotspots with minimal code changes von Himstedt, Kai

“… parallelization of compute-intensive loops without data dependencies. Splitting the work at such hotspots between the instances represents an independent level of parallelization on top of the domain decomposition …”
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Just-in-Time Compilation-Inspired Methodology for Parallelization of Compute Intensive Java Code von Mustafa, Ghulam, Mahmood, Waqar, Ghani, Muhammad Usman

“… Such repetitive code is commonly known as hotspot code. We observed that compute intensive hotspots often possess exploitable loop level parallelism. A JIT (Just-in-Time …”
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An Implementation of LLVM Pass for Loop Parallelization Based on IR-Level Directives von Jingu, Kengo, Shigenobu, Kohta, Ootsu, Kanemitsu, Ohkawa, Takeshi, Yokota, Takashi

“… Currently, multicore processors are widely used, and processing performance can be improved on many machines by exploiting thread level parallelism …”
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Scalable parallel implementation of exact inference in Bayesian networks von Namasivayam, V.K., Prasanna, V.K.

“… We explore two levels of parallelization: top level parallelization which uses pointer jumping to stride across nodes …”
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Directive-Based Parallelization of For-Loops at LLVM IR Level von Jingu, Kengo, Shigenobu, Kohta, Ootsu, Kanemitsu, Ohkawa, Takeshi, Yokota, Takashi

“… In this paper, we design the IRlevel parallelization directives for the LLVM infrastructure and implement them in LLVM …”
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Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted Hardware Compilation: A Geometric Programming Framework von Qiang Liu, Constantinides, G.A., Masselos, K., Cheung, P.

“… ) decisions and loop-level parallelization, in the context of field-programmable-gate-array-targeted hardware compilation …”
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Improving scalability of Earth system models through coarse-grained component concurrency – a case study with the ICON v2.6.5 modelling system von Linardakis, Leonidas, Stemmler, Irene, Hanke, Moritz, Ramme, Lennart, Chegini, Fatemeh, Ilyina, Tatiana, Korn, Peter

“… dimension that complements typically used parallelization methods such as domain decomposition and loop-level shared-memory approaches …”
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Hybrid Approach for Parallelization of Sequential Code with Function Level and Block Level Parallelization von Ashwin Kumar, K., Aasish Kumar Pappu, Sarath Kumar, K., Sudip Sanyal

“… with functional level analysis for parallelization of sequential code and its illustrates its advantages over block …”
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Acceleration of Semiempirical QM/MM Methods through Message Passage Interface (MPI), Hybrid MPI/Open Multiprocessing, and Self-Consistent Field Accelerator Implementations von Ojeda-May, Pedro, Nam, Kwangho

“… The serial version of the code was first profiled to identify routines that required parallelization …”
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An efficient parallel algorithm for 3D magnetotelluric modeling with edge-based finite element von Zhu, Xiaoxiong, Liu, Jie, Cui, Yian, Gong, Chunye

“… The algorithm is based on distributed matrix storage and has three levels of parallelism. The first two are process level parallelization for frequencies and matrix solving, and the last is thread-level parallelization for loop unrolling …”
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Programming parallel dense matrix factorizations and inversion for new-generation NUMA architectures von Catalán, Sandra, Igual, Francisco D., Herrero, José R., Rodríguez-Sánchez, Rafael, Quintana-Ortí, Enrique S.

“… by proposing multi-domain implementations for DMFI plus a hybrid task- and loop-level parallelization …”
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MapReduce inspired loop mapping for coarse-grained reconfigurable architecture von Yin, ShouYi, Shao, ShengJia, Liu, LeiBo, Wei, ShaoJun

“… The proposed approach can find the optimal unrolling factor for each level loop, resulting in better parallelization of loops …”
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Parallelizing more Loops with Compiler Guided Refactoring von Larsen, P., Ladelsky, R., Lidman, J., McKee, S. A., Karlsson, S., Zaks, A.

“… The performance of many parallel applications relies not on instruction-level parallelism but on loop-level parallelism …”
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Time stamp algorithms for runtime parallelization of DOACROSS loops with dynamic dependences von Xu, C.-Z., Chaudhary, V.

“… This paper presents a time stamp algorithm for runtime parallelization of general DOACROSS loops that have indirect access patterns …”
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NUMA-Aware Dense Matrix Factorizations and Inversion with Look-Ahead on Multicore Processors von Catalan, Sandra, Igual, Francisco D., Rodriguez-Sanchez, Rafael, Herrero, Jose R., Quintana-Orti, Enrique S.

“… ". In addition, it exploits both hybrid task- and loop-level parallelizations while taking into account the NUMA organization of the memory hierarchy …”
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A practical run-time technique for exploiting loop-level parallelism von Huang, Tsung-Chuan, Hsu, Po-Hsueh

“… ) test, to further exploit loop-level parallelism. Two main characteristics make the SPNT test distinguished …”
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Parallelizing Bzip2: A Case Study in Multicore Software Engineering von Pankratius, V., Jannesari, A., Tichy, W.F.

“… We conducted a case study of parallelizing a real program for multicore computers using currently available libraries and tools. We selected the sequential …”
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Speculative parallelization von Gonzalez-Escribano, A., Llanos, D.R.

“… The most promising technique for automatically parallelizing loops when the system cannot determine dependences at compile time is speculative parallelization …”
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On loop transformations of nested loops with affine dependencies von Popp, Andreas, Zimmermann, Karl-Heinz

“… The most common parallelization methods used are loop-level transformations based on unimodular transformations, and the most useful unimodular transformations are inner and outer loop …”
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