Výsledky vyhledávání - IEEE International Conference on Algorithms and Architectures for Parallel Processing

ICAPP 95 : IEEE First ICA[3]PP : IEEE First International Conference on Algorithms and Architectures for Parallel Processing, Brisbane, Australia, 19-21 April, 1995 Autor IEEE International Conference on Algorithms and Architectures for Parallel Processing, Narasimhan, V. L.

Získat plný text

Proceedings fifth International Conference on algorithms and architectures for parallel processing Autor IEEE International Conference on Algorithms and Architectures for Parallel Processing, Zhou, Wanlei

Získat plný text

Proceedings of 1996 IEEE Second International Conference on Algorithms & Architectures for Parallel Processing, ICA[3]PP '96, June 11-13, 1996, Singapore Autor IEEE International Conference on Algorithms and Architectures for Parallel Processing, Institute of Electrical and Electronics Engineers. Singapore Section, IEEE Singapore Section. Computer Chapter, National University of Singapore. Dept. of Information Systems and Computer Science

Získat plný text

1997 3rd International Conference on Algorithms & Architectures for Parallel Processing, ICA[3]PP '97, Melbourne, Australia Decsmber 10-12 1997 Autor IEEE International Conference on Algorithms and Architectures for Parallel Processing, Institute of Electrical and Electronics Engineers. Victorian section, Gościński, Andrzej, Hobbs, Michael, Zhou, Wanlei, Deakin University Faculty of Science and Technology, Deakin University IEEE Victorian Section

Získat plný text

Algorithms and architectures for parallel processing: 1997 3rd international conference, Melbourne, Australia, December 10-12 1997 Autor Goscinski, Andrzej, Zhou, Wanlei, Hobbs, Michael

“…This volume of proceedings describes the lower costs and higher degrees of integration of chip architecture which allow parallel processing…”
Získat plný text

Special issue: International conference on algorithms and architectures for parallel processing (ICA3PP'09): Foreword Autor Horng, Shi-Jinn

Získat plný text

Algorithms And Architectures For Parallel Processing - Proceedings Of The 1997 3rd International Conference Autor Goscinski, Andrzej Marian, Zhou, Wan Lei, Hobbs, Michael

Získat plný text

Petascale Application of a Coupled CPU-GPU Algorithm for Simulation and Analysis of Multiphase Flow Solutions in Porous Medium Systems, In: 2014 IEEE 28th International Parallel and Distributed Processing Symposium Autor McClure, James E., Wang, Hao, Prins, Jan F., Miller, Cass T., Feng, Wu-Chun

“…Large-scale simulation can provide a wide range of information needed to develop and validate theoretical models for multiphase flow in porous medium systems…”
Získat plný text

Proceedings, Second International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN '96), June 12-14, 1996, Beijing, Chaina Autor International Symposium on Parallel Architectures, Algorithms, and Networks, Li, G.-J. (Guo-Jie), Chinese National Research Center for Intelligent Computing Systems, IEEE Computer Society

Získat plný text

Proceedings of the 1994 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN), December 14-16, 1994, Kanazawa, Japan Autor International Symposium on Parallel Architectures, Algorithms, and Networks, 堀口, 進, Hsu, D. Frank (Derbiau Frank), Kimura, Masayuki, 北陸先端科学技術大学院大学, IEEE Computer Society

Získat plný text

Proceedings, 2000 International Conference on Parallel Architectures and Compilation Techniques, October 15-19, 2000, Philadelphia, Pennsylvania Autor IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques, IEEE Computer Society. Technical Committee on Computer Architecture, IEEE Computer Society. Technical Committee on Parallel Processing, SIGARCH, IBM, Intel, SGI

Získat plný text

Proceedings, Fifth IEEE International Workshop on Computer Architecture for Machine Perception, September 11-13, 2000, Padova, Italy Autor IEEE International Workshop on Computer Architecture for Machine Perception, Cantoni, Virgino, Guerra, Concettina, IEEE Computer Society, IEEE Computer Society. Technical Committees on Patern Analysis and Recognition, Parallel Processing, and Computer Archtecture, SIGARCH, Association for Computing Machinery

Získat plný text

Proceedings, 2001 International Conference on Parallel Architectures and Compilatin Techniques, 8-12 September 2001, Barcelona, Catalunya, Spain Autor IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques, IEEE Computer Society. Technical Committee on Computer Architecture, IEEE Computer Society. Technical Committee on Parallel Processing, SIGARCH, Technical University of Catalunya

Získat plný text

Proceedings, 2002 International Conference on Parallel Architectures and Compilatin Techniques, PACT2002, 22-25 September 2002, Charlottesville, Virginia, USA Autor IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques, IEEE Computer Society. Technical Committee on Computer Architecture, IEEE Computer Society. Technical Committee on Parallel Processing

Získat plný text

Proceedings of the Third IEEE International Symposium on High Performance Distributed Computing, August 2-5, 1994, San Francisco, California Autor International Symposium on High-Performance Distributed Computing, IEEE Computer Society. TC Distributed Computing, Syracuse University. Northeast Parallel Architectures Center

Získat plný text

Proceedings, Seventh International Workshop on Computer Architecture for Machine Perception : CAMP 2005, 4-6 July 2005, Palermo, Italy Autor IEEE International Workshop on Computer Architectures for Machine Perception, Di Gesù, Vito, Tegolo, Domenico, IEEE Computer Society. Technical Committee on Pattern Analysis and Machine Intelligence, IEEE Computer Society. Technical Committee on Parallel Processing, IEEE Computer Society. Technical Committee on Computer Architecture

Získat plný text

Neural Speech Phase Prediction Based on Parallel Estimation Architecture and Anti-Wrapping Losses Autor Ai, Yang, Ling, Zhen-Hua

“… The proposed model is a cascade of a residual convolutional network and a parallel estimation architecture…”
Získat plný text

InnerSP: A Memory Efficient Sparse Matrix Multiplication Accelerator with Locality-Aware Inner Product Processing Autor Baek, Daehyeon, Hwang, Soojin, Heo, Taekyung, Kim, Daehoon, Huh, Jaehyuk

“… To mitigate the memory access overheads, recent accelerator designs advocated the outer product processing which minimizes input accesses but generates intermediate products to be merged to the final output matrix…”
Získat plný text

Skywalker: Efficient Alias-Method-Based Graph Sampling and Random Walk on GPUs Autor Wang, Pengyu, Li, Chao, Wang, Jing, Wang, Taolei, Zhang, Lu, Leng, Jingwen, Chen, Quan, Guo, Minyi

“…Graph sampling and random walk operations, capturing the structural properties of graphs, are playing an important role today as we cannot directly adopt computing-intensive algorithms on large-scale graphs…”
Získat plný text

Splitwise: Efficient Generative LLM Inference Using Phase Splitting Autor Patel, Pratyush, Choukse, Esha, Zhang, Chaojie, Shah, Aashaka, Goiri, Inigo, Maleki, Saeed, Bianchini, Ricardo

“…Generative large language model (LLM) applications are growing rapidly, leading to large-scale deployments of expensive and power-hungry GPUs. Our…”
Získat plný text