Výsledky vyhledávání - Hardware Integrated circuits Logic circuits Sequential circuits

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    Parallel Dynamic Partitioning for Datapath Combinational Equivalence Checking Autor Zhou, Shuai, Zhang, Weikang, Zhang, Xindi, Jiang, Zite, You, Haihang, Cai, Shaowei

    Vydáno: IEEE 22.06.2025
    “…Combinational Equivalence Checking (CEC) is a crucial technique in electronic design automation for verifying the functional equivalence of combinational circuits…”
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    PastATPG: A Hybrid ATPG Framework for Better Test Compaction with Partial Assignment SAT Autor Chao, Zhiteng, Zhang, Xindi, Zhang, Xinyu, Mu, Jianan, Liu, Zizhen, Liang, Shengwen, Cai, Shaowei, Ye, Jing, Li, Xiaowei, Li, Huawei

    Vydáno: IEEE 22.06.2025
    “… However, as the size and complexity of circuits grow, SAT-based ATPG faces challenges like pattern inflation and excessive runtime, limiting its overall performance…”
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    qSeq: Full Algorithmic and Tool Support for Synthesizing Sequential Circuits in Superconducting SFQ Technology Autor Pasandi, Ghasem, Pedram, Massoud

    Vydáno: IEEE 05.12.2021
    “…Synthesizing general nonlinear sequential circuits in superconducting Single Flux Quantum (SFQ…”
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    Synthesis of statically analyzable accelerator networks from sequential programs Autor Shaoyi Cheng, Wawrzynek, John

    ISSN: 1558-2434
    Vydáno: ACM 01.11.2016
    “…This paper describes a general framework for transforming a sequential program into a network of processes, which are then converted to hardware accelerators through high level synthesis…”
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    Optimal circuits for parallel bit reversal Autor Ren Chen, Prasanna, Viktor K.

    Vydáno: IEEE 01.06.2017
    “…In this paper, we develop novel parallel circuit designs for calculating the bit reversal…”
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    SeGen: Automatic Topology Generator for Sequencing Elements Autor Kang, Kyounghun, Jung, Wanyeong

    ISSN: 1558-2434
    Vydáno: ACM 27.10.2024
    “…Sequencing elements, such as flip-flops (FFs), significantly impact the speed, size, and power consumption of digital integrated circuits…”
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    Minimizing area and power of sequential CMOS circuits using threshold decomposition Autor Kulkarni, Niranjan, Nukala, Nishant, Vrudhula, Sarma

    ISBN: 9781450315739, 1450315739
    ISSN: 1092-3152
    Vydáno: New York, NY, USA ACM 05.11.2012
    “…This paper describes the design of a standard cell library of differential mode threshold gates, referred to as a Threshold Logic Latch or TLL, and new threshold function identification…”
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    Security against hardware Trojan through a novel application of design obfuscation Autor Chakraborty, R.S., Bhunia, S.

    ISSN: 1092-3152
    Vydáno: IEEE 02.11.2009
    “…Malicious hardware Trojan circuitry inserted in safety-critical applications is a major threat to national security…”
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    Dynamic Verification of Sequential Consistency Autor Meixner, Albert, Sorin, Daniel J.

    ISBN: 076952270X, 9780769522708
    ISSN: 1063-6897
    Vydáno: Washington, DC, USA IEEE Computer Society 01.05.2005
    “… One such consistency model is sequential consistency (SC), which specifies that all loads and stores appear to execute in a total order that respects program order for each thread…”
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    Power gating applied to MP-SoCs for standby-mode power management Autor Flynn, David

    ISBN: 1450320716, 9781450320719
    ISSN: 0738-100X
    Vydáno: New York, NY, USA ACM 29.05.2013
    “…Complex SoCs from servers to intelligent sensors are increasingly built up from heterogeneous IP cores and subsystems. Accelerator blocks or additional…”
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    Polynomial arithmetic using sequential stochastic logic Autor Saraf, Naman, Bazargan, Kia

    Vydáno: ACM 18.05.2016
    “…We present the design of stochastic computing systems based on sequential logic to implement arbitrary polynomial functions…”
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    Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients Autor Badaroglu, Mustafa, Tiri, Kris, Donnay, StÉphane, Wambacq, Piet, Man, Hugo De, Verbauwhede, Ingrid, Gielen, Georges

    ISBN: 1581134614, 9781581134612
    ISSN: 0738-100X
    Vydáno: New York, NY, USA ACM 10.06.2002
    “…In a synchronous clock distribution network with zero latencies, digital circuits switch simultaneously on the clock edge, therefore they generate substrate noise due to the sharp peaks on the supply current…”
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    Skewed flip-flop transformation for minimizing leakage in sequential circuits Autor Seomun, Jun, Kim, Jaehyun, Shin, Youngsoo

    ISBN: 1595936270, 9781595936271
    ISSN: 0738-100X
    Vydáno: New York, NY, USA ACM 04.06.2007
    “… However, current approaches target the combinational circuits even though sequential elements, such as flip-flops, contribute an appreciable proportion of the total leakage…”
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    EPICS: Efficient Parallel Pattern Fault Simulation for Sequential Circuits via Strongly Connected Components Autor Wang, Mingjun, Wang, Hui, Mu, Jianan, Zhang, Xinyu, Sun, Bin, Wen, Yihan, Liu, Zizhen, Gu, Feng, Gao, Jun, Liang, Shengwen, Ye, Jing, Li, Xiaowei, Li, Huawei

    Vydáno: IEEE 22.06.2025
    “… However, for large-scale industrial sequential circuits, these simulations are time-consuming, creating a significant bottleneck in chip development…”
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    Equivalence Checking of Sequential Quantum Circuits Autor Wang, Qisheng, Li, Riling, Ying, Mingsheng

    ISSN: 0278-0070, 1937-4151
    Vydáno: New York IEEE 01.09.2022
    “…We define a formal framework for equivalence checking of sequential quantum circuits…”
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    Conflict driven learning in a quantified Boolean Satisfiability solver Autor Zhang, Lintao, Malik, Sharad

    ISBN: 0780376072, 9780780376076
    ISSN: 1092-3152
    Vydáno: New York, NY, USA ACM 10.11.2002
    “…) as many interesting sequential circuit verification problems can be formulated as QBF instances…”
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    Sequential Circuits Synthesis for Rapid Single Flux Quantum Logic Based on Finite State Machine Decomposition Autor Yang, Shucheng, Gao, Xiaoping, Ren, Jie

    ISSN: 0278-0070, 1937-4151
    Vydáno: New York IEEE 01.10.2023
    “… Logic synthesis is crucial in converting behavioral circuit description into a circuit netlist, typically combining combinational and sequential circuit synthesis…”
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