Výsledky vyhledávání - Hardware Electronic design automation Logic synthesis Circuit optimization*

Scalable Optimal Layout Synthesis for NISQ Quantum Processors Autor Lin, Wan-Hsuan, Kimko, Jason, Tan, Bochen, Bjorner, Nikolaj, Cong, Jason

“…Due to its effect on the success rate of a quantum circuit, quantum layout synthesis is a crucial step for circuit compilation…”
Získat plný text

Late Breaking Results: Hybrid Logic Optimization with Predictive Self-Supervision Autor Fu, Rongliang, Zhang, Ran, Zheng, Ziyang, Shi, Zhengyuan, Pu, Yuan, Huang, Junying, Xu, Qiang, Ho, Tsung-Yi

“…Hybrid optimization is an emerging approach in logic synthesis, focusing on applying diverse optimization methods to different parts of a logic circuit…”
Získat plný text

Local Bayesian Optimization For Analog Circuit Sizing Autor Touloupas, Konstantinos, Chouridis, Nikos, Sotiriadis, Paul P.

“…This paper proposes a Bayesian Optimization (BO) algorithm to handle large-scale analog circuit sizing…”
Získat plný text

RL-Sizer: VLSI Gate Sizing for Timing Optimization using Deep Reinforcement Learning Autor Lu, Yi-Chen, Nath, Siddhartha, Khandelwal, Vishal, Lim, Sung Kyu

“…Gate sizing for timing optimization is performed extensively throughout electronic design automation (EDA) flows…”
Získat plný text

Logic Optimization Meets SAT: A Novel Framework for Circuit-SAT Solving Autor Shi, Zhengyuan, Tang, Tiebing, Zhu, Jiaying, Khan, Sadaf, Zhen, Hui-Ling, Yuan, Mingxuan, Chu, Zhufei, Xu, Qiang

“…) problem, plays a critical role in integrated circuit design and verification. However, existing SAT solvers, optimized for Conjunctive Normal Form (CNF…”
Získat plný text

An Efficient Algorithm for Sparse Quantum State Preparation Autor Gleinig, Niels, Hoefler, Torsten

“…Generating quantum circuits that prepare specific states is an essential part of quantum compilation…”
Získat plný text

MARIO: A Superadditive Multi-Algorithm Interworking Optimization Framework for Analog Circuit Sizing Autor Li, Wangzhen, Meng, Yuan, Lyu, Ruiyu, Yan, Changhao, Zhu, Keren, Bi, Zhaori, Zhou, Dian, Zeng, Xuan

“…Numeric optimization methods are widely utilized to tackle complex analog circuit sizing problems, where the challenges include expensive simulations, non-linearity, and high parameter dimensionality…”
Získat plný text

Design and Technology Co-optimization Utilizing Flip-FET (FFET) Standard Cells Autor Ahn, Jaehoon, Kim, Taewhan

“… However, the layout synthesis of CFET based standard cells and its use in physical design implementation are not fully compatible with the effective exploitation of backside interconnects…”
Získat plný text

A Post-Implementation Performance Prediction Method with HLS Optimization Directives Autor Zhu, Jingyu, Ding, Yan, Xiao, Lu, Li, Kenli, Liu, Chubo, Xiao, Zheng

“…High-Level Synthesis (HLS) offers various optimization directives that enable designers to flexibly adjust hardware microarchitecture…”
Získat plný text

Device-Algorithm Co-Design of Ferroelectric Compute-in-Memory In-Situ Annealer for Combinatorial Optimization Problems Autor Qian, Yu, Huang, Xianmin, Wang, Ranran, Yang, Zeyu, Zhou, Min, Kampfe, Thomas, Zhuo, Cheng, Yin, Xunzhao

“…Combinatorial optimization problems (COPs) are crucial in many applications but are computationally demanding…”
Získat plný text

Efficient Continuous Logic Optimization with Diffusion Model Autor Ouyang, Yikang, Yu, Xiaofei, Zhu, Jiadong, Chen, Tinghuan, Ma, Yuzhe

“…The logic synthesis optimization flow is crucial to the quality of results (QoR), which applies a sequence of transformations to a design…”
Získat plný text

SmaRTLy: RTL Optimization with Logic Inferencing and Structural Rebuilding Autor Li, Chengxi, Sun, Yang, Chen, Lei, Wang, Yiwen, Yuan, Mingxuan, Young, Evangeline F.Y.

“…This paper proposes smaRTLy: a new optimization technique for multiplexers in Register-Transfer Level (RTL) logic synthesis…”
Získat plný text

Batch Sequential Black-box Optimization with Embedding Alignment Cells for Logic Synthesis Autor Feng, Chang, Lyu, Wenlong, Chen, Zhitang, Ye, Junjie, Yuan, Mingxuan, Hao, Jianye

“… In this paper, we formulate the logic synthesis design space exploration as a conditional sequence optimization problem, where at each transformation step, an optimization operator is selected…”
Získat plný text

Atomique: A Quantum Compiler for Reconfigurable Neutral Atom Arrays Autor Wang, Hanrui, Liu, Pengyu, Tan, Daniel Bochen, Liu, Yilian, Gu, Jiaqi, Pan, David Z., Cong, Jason, Acar, Umut A., Han, Song

“…), which allows for coherent atom movements during circuit execution under some constraints. Such atom movements, which are unique to this architecture, could reduce the cost…”
Získat plný text

Logic Restructuring with Preserved Logic Blocks Autor Lee, Siang-Yun, Riener, Heinz, Richter, Sascha, Sood, Ankush

“…) by decomposing blocks of logic that could have been mapped into complex cells. Besides, it is also of practical interest to model and preserve some special logic components, such as the enable logic of flops, during optimization…”
Získat plný text

HLS-Based Optimization and Design Space Exploration for Applications with Variable Loop Bounds Autor Choi, Young-kyu, Cong, Jason

“… (DSE) frameworks for high-level synthesis (HLS) tools have been recently proposed to automatically determine the FPGA design parameters…”
Získat plný text

PatLabor: Pareto Optimization of Timing-Driven Routing Trees Autor Chen, Zhiyang, Yao, Hailong, Yin, Xia

“…Wirelength is the fundamental metric for VLSI routing. With the advancement of new technologies, wire delay has also become a significant factor for timing…”
Získat plný text

ELF: Efficient Logic Synthesis by Pruning Redundancy in Refactoring Autor Tsaras, Dimitris, Li, Xing, Chen, Lei, Xie, Zhiyao, Yuan, Mingxuan

“…In electronic design automation, logic optimization operators play a crucial role in minimizing the gate count of logic circuits…”
Získat plný text

EDGE: DBMS-Empowered Boolean Decomposition for GIG Synthesis Autor Tang, Ruofei, Zhu, Xuliang, Zhang, Xinyi, Chen, Lei, Li, Xing, Yuan, Mingxuan, Xu, Jianliang

“… Decomposition-based logic synthesis yields high-quality results and is particularly effective when combined with small-window optimization methods in Gate-Inverter Graphs (GIG…”
Získat plný text

Approximate Equivalence Checking of Noisy Quantum Circuits Autor Hong, Xin, Ying, Mingsheng, Feng, Yuan, Zhou, Xiangzhen, Li, Sanjiang

“…We study the fundamental design automation problem of equivalence checking in the NISQ…”
Získat plný text