Search Results - HDL coder

Chaotic or Hyper-chaotic Oscillator? Numerical Solution, Circuit Design, MATLAB HDL-Coder Implementation, VHDL Code, Security Analysis, and FPGA Realization by Bonny, Talal

“… The realization is performed using two versions of VHDL code, one is generated automatically using a MATLAB HDL-Coder, and the optimized one which is manually written…”
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An optimizing technique for using MATLAB HDL coder by Kayed, Somaya, Elsayed, Ghada

“… MATLAB HDL coder serves a dual purpose, providing a quick proof of concept on the one hand and providing the g an easy-to-use platform for testing and verification on the other…”
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Easy and Straightforward FPGA Implementation of Model Predictive Control Using HDL Coder by Purraji, Marziye, Zamiri, Elyas, de Castro, Angel

“… This paper addresses this challenge by introducing a straightforward methodology that simplifies FPGA implementation using MATLAB R2022b Simulink HDL Coder…”
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FPGA design and implementation for montgomery multiplication algorithm using MATLAB HDL coder by Elsayed, Ghada, Abass, Eman S.

“… This paper proposes the FPGA design and implementation using MATLAB HDL Coder. Results The algorithm is modified such that it can fit any small/large FPGA by introducing scaling factor…”
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Developing Firmware for Space Weather Probes 2 Using HDL Coder by Wallace, Nicholas L

“…GPS and wireless communications are affected by interference from the ionosphere. Space weather affects plasma in the ionosphere, causing communication…”
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Design and Co-Simulation of Depth Estimation Using Simulink HDL Coder and Modelsim by Memon, Farida, Memon, Aamir Hussain, Talpur, Shahnawaz, Memon, Fayaz Ahmed, Memon, Rafia Naz

“…). In the first phase, design is carriedout in MATLAB. Using HDL Coder, MATLAB floating- point design is converted to an efficient fixed-point design and generated VHDL Code and test-bench from fixed point MATLAB code…”
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On FPGA Implementation of a Continuous-Discrete Time Observer for Sensorless Induction Machine using Simulink HDL Coder by Besbes, Moez, Hadj, Salim, M’Sahli, Faouzi, Farza, Monther

“…This paper deals with the design of a continuousdiscrete time high gain observer (CDHGO) for sensorless control of an induction machine (IM). Only two weakly…”
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Performance of FPGA-Based Implementations of Data Classification Techniques Using HDL Coder by Zafar, Adil

“… However, FPGAs can only be configured through Hardware description languages (HDL) which can become tedious and complicated when trying to implement complex algorithms…”
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Hardware Acceleration for Object Detection using YOLOv5 Deep Learning Algorithm on Xilinx Zynq FPGA Platform by Saidani, Taoufik, Ghodhbani, Refka, Alhomoud, Ahmed, Alshammari, Ahmad, Zayani, Hafedh, Ben Ammar, Mohammed

“…Object recognition presents considerable difficulties within the domain of computer vision. Field-Programmable Gate Arrays (FPGAs) offer a flexible hardware…”
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Performance of FPGA-based Implementations of Data Classification Techniques using HDL Coder by Zafar, Adil, Yeh, Hen-Geul

“…) using a high-level synthesis (HLS) tool. We implement data classification techniques using Simulink with HDL Coder onto a Basys 3 FPGA board…”
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Implementation of hyperbolic tangent function in neural network using Matlab HDL coder for Biosignals by Nasser, Andre David Colindres, Verdial, Jorge Canales, Ordonez-Avila, Jose Luis

“…In this paper, the hyperbolic tangent function and its application in a test neural network on a Field Programmable Gate Array are presented, using the Verilog…”
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FPGA Implementation of Range Migration Algorithm for Synthetic Aperture Radar Using Simulink HDL Coder by Meng, Yang, Yang, Haoyi, Chen, Bocheng, Chen, Guoping, Qing, Anyong

“…) is proposed in this paper. We utilize the Simulink HDL Coder toolbox to encapsulate the algorithm into an IP Core, subsequently verifying it on the Xilinx XC7Z020…”
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Hardware implementation of neural network-based engine model using FPGA by Magdy Saady, Marina, Hassan Essai, Mohamed

“… These implemented engine models were described using MATLAB/Simulink and hardware description language coder and carried out by Spartan -3E-500…”
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Real Time FPGA Implementation of an Efficient High Speed Harris Corner Detection Algorithm Based on High-Level Synthesis by Ghodhbani, Refka, Saidani, Taoufik, Alhomoud, Ahmed, Alshammari, Ahmad, Ahmed, Rabie

“… in real-time by applying color conversion and Harris corner detection. The filter hardware designs used in the system were made using the HDL Coder tool in Matlab/Simulink without writing HDL code…”
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FPGA implementation of fractional-order chaotic systems by Shah, Divya K., Chaurasiya, Rohit B., Vyawahare, Vishwesh A., Pichhode, Khushboo, Patil, Mukesh D.

“…). In the proposed work Simulink model of each chaotic system is first realized using HDL coder of MATLAB, wherein each coefficient and signal is represented using a fixed number of bits…”
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FPGA design and implementation of fuzzy learning control: Application on DC motor position control by Achour Touat, Mohand, Khati, Hocine, Fekik, Arezki, Taher Azar, Ahmad, Talem, Hand, Mellah, Rabah, Ahmed, Saim

“…This paper investigates the implementation of a Fuzzy Model Reference Learning Control (FMRLC) on a Zedboard Zynq-7000 FPGA. The proposed adaptive controller…”
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Rapid Prototyping for Design and Test of FPGA-Based Model Predictive Controllers for Power Converters by Purraji, Marziye, Zamiri, Elyas, Sanchez, Alberto, de Castro, Angel

“… The methodology leverages MATLAB HDL Coder for automated HDL code generation. This approach offers a streamlined process and eliminates the need for expertise in hand-coded HDL, making it an ideal solution for power electronics engineers…”
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A Reconfigurable Hardware Realization for Real-Time Simulation of Cardiac Excitation and Conduction by Mahmud, Farhanahani, Adon, Nur Atiqah, Othman, Norliza, Hakim, Ade Anggian, Morsin, Marlia, Jabbar, Mohamad Hairol

“…). FPGA rapid prototyping using MATLAB Hardware Description Language (HDL) Coder was used to convert a fixed-point MATLAB Simulink blocks design of the cardiac models into a synthesizable VHSIC Hardware Description Language (VHDL…”
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COMPARISON OF COMPILERS FOR GENERATING A HARDWARE DESCRIPTION BASED ON AN IMPERATIVE PROGRAM: HDL CODER AND VITIS HLS by BUTKO, Vladyslav, KASIAN, Kostiantyn, KASIAN

“… Based on the Matlab and C++ programs, HDL was generated with the HLS tools: HDL Coder and Vitis HLS, respectively…”
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Model-based Design of a High-Throughput Canny Edge Detection Accelerator on Zynq-7000 FPGA by Alhomoud, Ahmed, Ghodhbani, Refka, Saidani, Taoufik, Zayani, Hafedh Mahmoud, Said, Yahia, Ammar, Mohamed Ben, Slimane, Jihane Ben

“…) based on the HDL Coder. Traditional RTL-based design methodologies for implementing image processing algorithms on FPGAs can be time-consuming and error-prone…”
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