Search Results - Computer Architecture and Design Methodologies,

SNAS: Fast Hardware-Aware Neural Architecture Search Methodology by Lee, Jaeseong, Rhim, Jungsub, Kang, Duseok, Ha, Soonhoi

“… It consists of three steps: 1) supernet design; 2) Single-Path NAS for fast architecture exploration…”
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An evolutionary strategy enhanced with a local search technique for the space allocation problem in architecture, Part 1: Methodology by Rodrigues, Eugénio, Gaspar, Adélio Rodrigues, Gomes, Álvaro

“…The drafting of floor plans is mostly hand made in today’s architectural design process…”
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An Efficient Methodology for Mapping Quantum Circuits to the IBM QX Architectures by Zulehner, Alwin, Paler, Alexandru, Wille, Robert

“…In the past years, quantum computers more and more have evolved from an academic idea to an upcoming reality. IBM's project IBM <inline-formula> <tex-math notation="LaTeX">{Q} </tex-math></inline-formula…”
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An Efficient and Accurate Variation-Aware Design Methodology for Near-Threshold MOS-Varactor-Based VCO Architectures by Dani, Lalit Mohan, Mishra, Neeraj, Bulusu, Anand

“…In this article, a variation-aware design methodology for high-performance MOS-varactor voltage-controlled ring oscillator (MV-VCRO…”
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Simulate and Eliminate: A Top-to-Bottom Design Methodology for Automatic Generation of Application Specific Architectures by Irturk, A., Matai, J., Oberg, J., Su, J., Kastner, R.

“… Achieving the desired area and throughput constraints requires careful tuning of the underlying architecture and high-level design tools are gaining increasing acceptance to achieve this goal…”
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A Novel Implementation Methodology for Error Correction Codes on a Neuromorphic Architecture by Hassan, Sahil, Dattilo, Parker, Akoglu, Ali

“… that is relatively unexplored outside of machine learning applications. For the first time, we propose a methodology to map the hard-decision class of decoder algorithms on a neuromorphic architecture…”
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A methodology for transferring principles of plant movements to elastic systems in architecture by Schleicher, Simon, Lienhard, Julian, Poppinga, Simon, Speck, Thomas, Knippers, Jan

“…In architecture, kinetic structures enable buildings to react specifically to internal and external stimuli through spatial adjustments…”
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A Methodology for Cognitive NoC Design by Wo-Tak Wu, Louri, Ahmed

“… for. We propose a new design methodology for implementing a cognitive network-on-chip that has the ability to recognize changes in the environment and to learn new ways to adapt to the changes…”
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A co-design methodology based on model driven architecture for real time embedded systems by Lecomte, Stéphane, Guillouard, Samuel, Moy, Christophe, Leray, Pierre, Soulard, Philippe

“…This paper presents the MOPCOM design methodology, developed to enable the efficient design of real time embedded systems, in particular radio…”
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Scenario-based design: New applications in metamorphic architecture by Eilouti, Buthayna

“… Consequently, the conventional design methodologies that deal with buildings as static entities do not always represent the proper method to generate user-friendly buildings…”
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Networks-on-Chip: Architectures, Design Methodologies, and Case Studies by Chen, Sao-Jie, Wu, An-Yeu Andy, Xu, Jiang

“… [...]the design of a Multi-Processor System-on-Chip (MP-SoC) architecture, which demands high throughput, low latency, and reliable global communication services, cannot…”
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A novel VHDL-based computer architecture design methodology by MacDonald, R., Srinivasan, S., Williams, R., Aylor, J.

“…There is a need for a design methodology that allows the representation and simulation of a design at various levels of abstraction and interpretation…”
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Low-Complexity and High-Speed Architecture Design Methodology for Complex Square Root by Mopuri, Suresh, Acharyya, Amit

“…In this paper, we propose a low-complexity and high-speed VLSI architecture design methodology for complex square root computation using COordinate Rotation DIgital Computer (CORDIC…”
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System-on-chip communication architecture: dynamic parallel fraction control bus design and test methodologies by Wang, N., Bayoumi, M.A.

“…Modern system-on-chip (SOC) designs consist of numerous heterogeneous components…”
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Softermax: Hardware/Software Co-Design of an Efficient Softmax for Transformers by Stevens, Jacob R., Venkatesan, Rangharajan, Dai, Steve, Khailany, Brucek, Raghunathan, Anand

“… To address this, we propose Softermax, a hardware-friendly softmax design. Softermax consists of base replacement, low-precision softmax computations, and an online normalization calculation…”
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Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies by Kvatinsky, Shahar, Satat, Guy, Wald, Nimrod, Friedman, Eby G., Kolodny, Avinoam, Weiser, Uri C.

“… In this paper, a methodology for designing this logic family is proposed. The design methodology is based on a general design flow, suitable for all deterministic memristive…”
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PyMTL: A Unified Framework for Vertically Integrated Computer Architecture Research by Lockhart, Derek, Zibrat, Gary, Batten, Christopher

“… (RTL) modeling. We introduce a new framework called PyMTL that aims to close this computer architecture research methodology gap by providing a unified design environment for FL, CL, and RTL modeling…”
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Design methodology for a modular service-driven network processor architecture by Gabrani, Maria, Dittmann, Gero, Döring, Andreas, Herkersdorf, Andreas, Sagmeister, Patricia, van Lunteren, Jan

“…We present a design methodology for a modular network processor architecture that leads to a balanced, service-defined mix between programmable processor cores, configurable hardware assists…”
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A graph placement methodology for fast chip design by Mirhoseini, Azalia, Goldie, Anna, Yazgan, Mustafa, Jiang, Joe Wenjie, Songhori, Ebrahim, Wang, Shen, Lee, Young-Joon, Johnson, Eric, Pathak, Omkar, Nova, Azade, Pak, Jiwoo, Tong, Andy, Srinivasa, Kavya, Hang, William, Tuncer, Emre, Le, Quoc V., Laudon, James, Ho, Richard, Carpenter, Roger, Dean, Jeff

“…Chip floorplanning is the engineering task of designing the physical layout of a computer chip…”
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NAAS: Neural Accelerator Architecture Search by Lin, Yujun, Yang, Mengtian, Han, Song

“…Data-driven, automatic design space exploration of neural accelerator architecture is desirable for specialization and productivity…”
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