Suchergebnisse - "offset binary coding"
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A NOVEL ALU USING DISTRIBUTED ARITHMETIC FOR REAL TIME SIGNAL PROCESSING APPLICATION
ISSN: 2620-2832, 2683-4111Veröffentlicht: University of Kragujevac 10.03.2025Veröffentlicht in Proceedings on engineering sciences (Online) (10.03.2025)“… In the modern era, DSP is widely used in electronics, notably in mobile technology. It uses LUT-based schemes (SOP) and uses arithmetic and logical operations …”
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Architectural Trade-Off Analysis for Accelerating LSTM Network Using Radix-r OBC Scheme
ISSN: 1549-8328, 1558-0806Veröffentlicht: New York IEEE 01.01.2023Veröffentlicht in IEEE transactions on circuits and systems. I, Regular papers (01.01.2023)“… This paper presents architectural trade-off analysis for accelerating two (Type I, II) fixed-point long short-term memory (LSTM) network based on circulant …”
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Optimal Complexity Architectures for Pipelined Distributed Arithmetic-Based LMS Adaptive Filter
ISSN: 1549-8328, 1558-0806Veröffentlicht: New York IEEE 01.02.2019Veröffentlicht in IEEE transactions on circuits and systems. I, Regular papers (01.02.2019)“… This paper presents three optimal-complexity structures (I, II, III) for pipelined distributed arithmetic (DA) based least-mean-square (LMS) adaptive filter …”
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Energy-efficient, high-performance and memory efficient FIR adaptive filter architecture of wireless sensor networks for IoT applications
ISSN: 0973-7677, 0973-7677Veröffentlicht: New Delhi Springer India 19.11.2022Veröffentlicht in Sadhana (Bangalore) (19.11.2022)“… Noise contaminates and distorts measurements from wireless sensor networks (WSNs). The sensor node's computations and energy consumption are increased due to …”
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Low-Complexity Distributed-Arithmetic-Based Pipelined Architecture for an LSTM Network
ISSN: 1063-8210, 1557-9999Veröffentlicht: New York IEEE 01.02.2020Veröffentlicht in IEEE transactions on very large scale integration (VLSI) systems (01.02.2020)“… Long short-term memory (LSTM) networks have addressed the shortcomings of recurrent neural networks, such as vanishing gradients and the lack of ability in …”
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Cognitive neurodynamic approaches to adaptive signal processing in wireless sensor networks
ISSN: 1871-4080, 1871-4099Veröffentlicht: Dordrecht Springer Netherlands 01.12.2025Veröffentlicht in Cognitive neurodynamics (01.12.2025)“… In recent years, Wireless Sensor Networks (WSN) have become vital because of their versatility in numerous applications. Nevertheless, the attain problems like …”
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A Novel Multiplier-Less LMS Adaptive Filter Design Based on Offset Binary Coded Distributed Arithmetic
ISSN: 2169-3536, 2169-3536Veröffentlicht: Piscataway IEEE 2021Veröffentlicht in IEEE access (2021)“… Multiply-Accumulate (MAC) operation is the backbone of Least Mean Squares (LMS) digital adaptive filters. Implementing LMS on hardware platform as a Fully …”
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An Optimized Hybrid Approach to Denoising of EEG Signals Using CNN and LMS Filtering
ISSN: 2079-9292, 2079-9292Veröffentlicht: Basel MDPI AG 18.03.2025Veröffentlicht in Electronics (Basel) (18.03.2025)“… Sleep is a physiological signal which plays a vital role in maintaining human health and well-being. Polysomnographic records provide insights into the various …”
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Two High-Performance Adaptive Filter Implementation Schemes Using Distributed Arithmetic
ISSN: 1549-7747, 1558-3791Veröffentlicht: New York IEEE 01.09.2011Veröffentlicht in IEEE transactions on circuits and systems. II, Express briefs (01.09.2011)“… Distributed arithmetic (DA) is performed to design bit-level architectures for vector-vector multiplication with a direct application for the implementation of …”
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Low-Area and High-Throughput Architecture for an Adaptive Filter Using Distributed Arithmetic
ISSN: 1549-7747, 1558-3791Veröffentlicht: New York IEEE 01.11.2013Veröffentlicht in IEEE transactions on circuits and systems. II, Express briefs (01.11.2013)“… A high-performance implementation scheme for a least mean square adaptive filter is presented. The architecture is based on distributed arithmetic in which the …”
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Design and implementation of Least Mean Square adaptive FIR filter using offset binary coding based Distributed Arithmetic
ISSN: 0141-9331Veröffentlicht: Kidlington Elsevier B.V 01.11.2019Veröffentlicht in Microprocessors and microsystems (01.11.2019)“… Distributed Arithmetic (DA) based architecture is an efficient technique to attain high throughput without hardware multiplier and also it is essential for bit …”
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Hardware Implementation of Low Complexity High-speed Perceptron Block
ISSN: 2158-1525Veröffentlicht: IEEE 28.05.2022Veröffentlicht in IEEE International Symposium on Circuits and Systems proceedings (28.05.2022)“… Perceptron is the basic computation unit of neural network architectures. This work proposes a resource-efficient and fast hardware for perceptron and …”
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Low Complexity and Critical Path Based VLSI Architecture for LMS Adaptive Filter Using Distributed Arithmetic
ISSN: 2380-6923Veröffentlicht: IEEE 01.01.2017Veröffentlicht in VLSI design (01.01.2017)“… This paper presents a new architecture for distributed arithmetic (DA) based Least Mean Square (LMS) adaptive filter with low hardware complexity and critical …”
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Analysis and Implementation of Block Least Mean Square Adaptive Filter using Offset Binary Coding
ISSN: 2379-447XVeröffentlicht: IEEE 01.05.2018Veröffentlicht in IEEE International Conference on Circuits and Systems (Online) (01.05.2018)“… In this paper, we present a new mathematical analysis and implementation of block-least-mean-square (BLMS) for finite-impulse-response (FIR) adaptive filter …”
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Area and Power Efficient VLSI Architecture of Distributed Arithmetic Based LMS Adaptive Filter
ISSN: 2380-6923Veröffentlicht: IEEE 01.01.2018Veröffentlicht in VLSI design (01.01.2018)“… This paper presents a new area and power efficient VLSI architecture for least-mean-square (LMS) adaptive filterusing distributed arithmetic (DA) …”
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A novel adaptive filter implementation scheme using distributed arithmetic
ISBN: 9781467303217, 1467303216ISSN: 1058-6393Veröffentlicht: IEEE 01.11.2011Veröffentlicht in 2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR) (01.11.2011)“… Distributed arithmetic (DA) is performed to design bit-level architectures for vector-vector multiplication with a direct application for the implementation of …”
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Design of parallel and pipelined DA based OBC fir filter for software defined radio
ISSN: 2502-4752, 2502-4760Veröffentlicht: 01.06.2019Veröffentlicht in Indonesian Journal of Electrical Engineering and Computer Science (01.06.2019)“… Software Defined Radio (SDR) is a new technology used to implement different wireless communication standard for mobile communication. The Intermediate …”
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Efficient VLSI Architectures for the Hadamard Transform Based on Offset-Binary Coding and ROM Decomposition
ISBN: 9781457708039, 1457708035ISSN: 2159-3469Veröffentlicht: IEEE 01.07.2011Veröffentlicht in 2011 IEEE Computer Society Annual Symposium on VLSI (01.07.2011)“… We present efficient architectures for the discrete Hadamard transform based on two techniques, namely offset binary coding and ROM decomposition. The proposed …”
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Performance evaluation of Distributed Arithmetic based MAC Structures for DSP Applications
Veröffentlicht: IEEE 01.07.2020Veröffentlicht in 2020 7th International Conference on Smart Structures and Systems (ICSSS) (01.07.2020)“… MAC is an essential core which is used in every Digital signal processor. The primary focal point of this article is to introduce a high performance …”
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High Speed Floating Point Multiply Accumulate Unit using Offset Binary Coding
Veröffentlicht: IEEE 01.07.2020Veröffentlicht in 2020 7th International Conference on Smart Structures and Systems (ICSSS) (01.07.2020)“… This paper deals with less delay efficient multiplier and accumulator unit for inner product, filtering [3] applications, convolution, image and video …”
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