Search Results - "decoder implementation"

  • Showing 1 - 14 results of 14
Refine Results
  1. 1

    Efficient Implementation of 400 Gbps Optical Communication FEC by Truhachev, Dmitri, El-Sankary, Kamal, Karami, Alireza, Zokaei, Abolfazl, Li, Shizhong

    ISSN: 1549-8328, 1558-0806
    Published: New York IEEE 01.01.2021
    “…We focus on a hardware implementation of the concatenated forward error-correction (FEC) decoder defined in 400ZR implementation agreement to provide a…”
    Get full text
    Journal Article
  2. 2

    Capacity-approaching protograph codes by Divsalar, D., Dolinar, S., Jones, C.R., Andrews, K.

    ISSN: 0733-8716, 1558-0008
    Published: New York IEEE 01.08.2009
    “…This paper discusses construction of protograph-based low-density parity-check (LDPC) codes. Emphasis is placed on protograph ensembles whose typical minimum…”
    Get full text
    Journal Article
  3. 3

    Ultra-High-Throughput EMS NB-LDPC Decoder with Full-Parallel Node Processing by Harb, Hassan, Ghouwayel, Ali Chamas Al, Conde-Canencia, Laura, Marchand, Cédric, Boutillon, Emmanuel

    ISSN: 1939-8018, 1939-8115
    Published: New York Springer US 01.10.2022
    Published in Journal of signal processing systems (01.10.2022)
    “…This paper presents an ultra-high-throughput decoder architecture for NB-LDPC codes based on the Hybrid Extended Min-Sum algorithm. We introduce a new…”
    Get full text
    Journal Article
  4. 4

    Implementation aspects of LDPC convolutional codes by Pusane, A.E., Feltstrom, A.J., Sridharan, A., Lentmaier, M., Zigangirov, K., Costello, Daniel J.

    ISSN: 0090-6778, 1558-0857, 1558-0857
    Published: New York, NY IEEE 01.07.2008
    Published in IEEE transactions on communications (01.07.2008)
    “…Potentially large storage requirements and long initial decoding delays are two practical issues related to the decoding of low-density parity-check (LDPC)…”
    Get full text
    Journal Article
  5. 5

    Design of LDPC decoders for improved low error rate performance: quantization and algorithm choices by Zhengya Zhang, Dolecek, L., Nikolic, B., Anantharam, V., Wainwright, M.

    ISSN: 0090-6778, 1558-0857
    Published: New York, NY IEEE 01.11.2009
    Published in IEEE transactions on communications (01.11.2009)
    “…Many classes of high-performance low-density parity-check (LDPC) codes are based on parity check matrices composed of permutation submatrices. We describe the…”
    Get full text
    Journal Article
  6. 6

    Non-binary LDPC Decoders Design for Maximizing Throughput of an FPGA Implementation by Suek, Wojciech

    ISSN: 0278-081X, 1531-5878
    Published: New York Springer US 01.11.2016
    Published in Circuits, systems, and signal processing (01.11.2016)
    “…Most of the recently proposed hardware realizations for non-binary low-density parity-check decoders are ASIC oriented as they employ multiplierless…”
    Get full text
    Journal Article
  7. 7

    Generic Description and Synthesis of LDPC Decoders by Guilloud, F., Boutillon, E., Tousch, J., Danger, J.-L.

    ISSN: 0090-6778, 1558-0857
    Published: New York, NY IEEE 01.11.2007
    Published in IEEE transactions on communications (01.11.2007)
    “…Through a rapid survey of the architecture of low-density parity-check (LDPC) decoders, this paper proposes a general framework to describe and compare the…”
    Get full text
    Journal Article
  8. 8

    Pipeline processing in low-density parity-check codes hardware decoder by Sulek, W

    ISSN: 0239-7528, 2300-1917
    Published: Warsaw Versita 01.06.2011
    “…Low-Density Parity-Check (LDPC) codes are one of the best known error correcting coding methods. This article concerns the hardware iterative decoder for a…”
    Get full text
    Journal Article
  9. 9

    Hardware-oriented turbo-product codes decoder architecture by Krainyk, Yaroslav, Perov, Vladyslav, Musiyenko, Maksym, Davydenko, Yevhen

    Published: IEEE 01.09.2017
    “…Model of Turbo-Product Codes decoder architecture and method for construction of Turbo-Product Codes decoder are proposed in the paper. The model describes…”
    Get full text
    Conference Proceeding
  10. 10

    Simplified check node processing in nonbinary LDPC decoders by Boutillon, E, Conde-Canencia, L

    ISBN: 1424467446, 9781424467440
    ISSN: 2165-4700
    Published: IEEE 01.09.2010
    “…This paper deals with low-complexity algorithms for the check node processing in nonbinary LDPC decoders. After a review of the state-of-the-art, we focus on…”
    Get full text
    Conference Proceeding
  11. 11

    A Dedicated Approach to Explore Design Space for Hardware Architecture of Turbo Decoders by Sanchez, O., Jezequel, M., ur Rehman, Saeed, Sani, A., Chavet, C., Coussy, P., Jego, C.

    ISBN: 146732986X, 9781467329866
    ISSN: 2162-3562
    Published: IEEE 01.10.2012
    “…Parallel turbo decoding techniques to achieve high throughput have been extensively investigated in the literature. These techniques are commonly combined. In…”
    Get full text
    Conference Proceeding
  12. 12

    Comments on "An Optimal Algorithm for Testing Stuck-at Faults in Random Access Memories" by Nair

    ISSN: 0018-9340
    Published: IEEE 01.03.1979
    Published in IEEE transactions on computers (01.03.1979)
    “…An efficient, optimal test sequence for detecting multiple stuck-at faults in random access memories (RAM's) for any decoder implementation is presented…”
    Get full text
    Journal Article
  13. 13

    Partial Order-Based Decoding of Rate-1 Nodes in Fast Simplified Successive-Cancellation List Decoders for Polar Codes by Johannsen, Lucas, Kestel, Claus, Griebel, Oliver, Vogt, Timo, Wehn, Norbert

    ISSN: 2079-9292, 2079-9292
    Published: Basel MDPI AG 01.02.2022
    Published in Electronics (Basel) (01.02.2022)
    “…Polar codes are the first family of error-correcting codes that can achieve channel capacity. Among the known decoding algorithms, Successive-Cancellation List…”
    Get full text
    Journal Article
  14. 14

    Exploring MPEG HEVC decoder parallelism for the efficient porting onto many-core platforms by de Saint Jorre, Damien, Alberti, Claudio, Mattavelli, Marco, Casale-Brunet, Simone

    ISSN: 1522-4880
    Published: IEEE 01.10.2014
    “…MPEG High Efficient Video Coding (HEVC) is likely to emerge as the video coding standard for HD and Ultra-HD TV resolutions. The two elements that push HEVC…”
    Get full text
    Conference Proceeding